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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3lpnkD0wPIAK+fLcWNezfNyKepBnekxGZyVsuHU0gv5BR/jNS/nJIXKSSivddG7uiw+nyb+4qFQWFaDJ/GbuBfFvuTsDSdrQ3i8zQI3NMiE4kGVPZMgCQDMGyhJu8T/eMQdwDESV+0BW6H1UY7qEL9moWH8gd9e4pXVM6feV4zMXy9/LbgQKyDKAtfUna8B/kvejpS0mthfk5DF2fEzQIwuDuMYtzCdKBLanrlnPmTBJv8tAJ3Per3o9X7eOVTZovja4HMof9K7JRVhsNn3GQ+ll0kTO45EKqfycpyiPC1tEIatZi3sIF5yh72tKQSbeXCQg8WFVAX2mach3dEb8wRbjI6udUjw9CAcpqOfa26XAQqspSGgZl7C7yyNYwwb2bEQgnlC0DfRhisMdneMmxX74FIaruk/Yb5mikRwW3q59WkcpZq2IsUQhV/wlLgSo8aUCgy//tzEpR3jXHI0q2lulR8GLfuLQzxbowg/inumuDvhGwVrF5MqBA4shLoQvawZZvbM7rsXBtyI6CbP0zNws1l8tXxoX3ebcwFnL5FVqm3F7WBY9Wy4RLVfMC8vvuujH7wROotfmxifMjZw6dnOVghBIBcMxONHILW/XrkwAiKxqaGay91sHJp1pugAYWzSXbWsfBUwyiVCRyNUUN4ocjZwnlze+th4utnyo7QovSn3Q/D5fLUNKXrOfIHEliOjtVuvZTCM8XwHMqgTY5qxjj13VHZUeKr6P6/QxeUDp2QMiwOVaGNqOxb+Cn17UTcMFF8L9EYXB7xdA7rCcyCpMt3Ab0OK491unWZy/+z4z5hdtZ2zuUvB7ZDszqszGWivrePZjXlUwSxqdqX4uOBk+CNTcEtUuuVwmdsu6F56y83sE3gJNMCoj/PS2QOq+vGeu+CXQYCilq/nc6CMj6d1GXUXSk665Smp3AJYGPjVcFEaqUzczaXtgaQh0T+8XbFSW/kL4CFeFNiytRn++7T0qda5YeXFXVuNuSkT+g0y1ILxi35/MwQkZdX2S/9yoiCAfjlhW1r9iKbB8kfCs0rao+hUqbqo3t1Pc9CSnCzaN2Hh1yCWf09cU+0H7mxC+m8zIU7fBqLIPEl9c/PS2leQo2dIUMXMb2tM+MZAqXD5NfWVQ8qWHryMDJDKqP8/tVkqb2L75JwSAmzhGZzyyWlaUB5GdX8gZwDPnCBKth+x035jwnRtgQ1SpEF9HHQfv49/jXrwj6wEm75fOrRNK2P4r0CTwPgaVq06yzLrb9JPWwgDrXaZkOPIqR2JS8fUN/OhgJisRhSNuCcKuJY64KXyzgLcipPy61IVH0lVOWVdETOGnVq251vOIL73X9t3rpj8A16mN9Id+9yYw4j8Q92B9WU7/CPiia4DxC5re3wV/s2J3M8R6Cyl9bDdApI1ucpXMWsFt3O+iz3DHwGsoI8CqKy84NxZwqAT6Bk/qEkvfxaq37PTNBJBEf72VKxg0DLHjPdYCzmHJuYAfOzTeoEmraTUjel1zl07DEg8pEDFbXMzqLchwN7AhNP+2cqiUFpZTRpwOeQFXpMJBw38HIq6RrUoa/t2jj86RMYiw5rx8PUgckWq2z2+P7szrT6wvu/d3vmVlfrSLFZeecFkntw== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f66e11c9-b796-49e8-438a-08da67844012 X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5136.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jul 2022 23:38:13.6035 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: HJjidXs8aPkbPvuhTujhDKtn73RxRM+jGB1p7ELlxzVqSIR457oCWwVJMZY6Be3PMadd3+UqbWRjNRn9bViGrA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB3997 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220716_163822_556621_F0F3C0D5 X-CRM114-Status: GOOD ( 15.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The irqchip->irq_set_type method is called by __irq_set_trigger() under the desc->lock raw spinlock. The armada-37xx implementation, armada_37xx_irq_set_type(), uses an MMIO regmap created by of_syscon_register(), which uses plain spinlocks (the kind that are sleepable on RT). Therefore, this is an invalid locking scheme for which we get a kernel splat stating just that ("[ BUG: Invalid wait context ]"), because the context in which the plain spinlock may sleep is atomic due to the raw spinlock. We need to go raw spinlocks all the way. Make this driver create its own MMIO regmap, with use_raw_spinlock=true, and stop relying on syscon to provide it. This patch depends on commit 67021f25d952 ("regmap: teach regmap to use raw spinlocks if requested in the config"). Fixes: 2f227605394b ("pinctrl: armada-37xx: Add irqchip support") Signed-off-by: Vladimir Oltean --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 27 ++++++++++++++++----- 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 8fddc67271b4..bcde042d29dc 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -1107,25 +1107,40 @@ static const struct of_device_id armada_37xx_pinctrl_of_match[] = { { }, }; +static const struct regmap_config armada_37xx_pinctrl_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .use_raw_spinlock = true, +}; + static int __init armada_37xx_pinctrl_probe(struct platform_device *pdev) { struct armada_37xx_pinctrl *info; struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; struct regmap *regmap; + void __iomem *base; int ret; + base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); + if (IS_ERR(base)) { + dev_err(dev, "failed to ioremap base address: %pe\n", base); + return PTR_ERR(base); + } + + regmap = devm_regmap_init_mmio(dev, base, + &armada_37xx_pinctrl_regmap_config); + if (IS_ERR(regmap)) { + dev_err(dev, "failed to create regmap: %pe\n", regmap); + return PTR_ERR(regmap); + } + info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL); if (!info) return -ENOMEM; info->dev = dev; - - regmap = syscon_node_to_regmap(np); - if (IS_ERR(regmap)) - return dev_err_probe(dev, PTR_ERR(regmap), "cannot get regmap\n"); info->regmap = regmap; - info->data = of_device_get_match_data(dev); ret = armada_37xx_pinctrl_register(pdev, info);