diff mbox series

[v2,26/41] drm/vc4: vec: Refactor VEC TV mode setting

Message ID 20220728-rpi-analog-tv-properties-v2-26-459522d653a7@cerno.tech (mailing list archive)
State New, archived
Headers show
Series drm: Analog TV Improvements | expand

Commit Message

Maxime Ripard Aug. 29, 2022, 1:11 p.m. UTC 
From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>

Change the mode_set function pointer logic to declarative config0,
config1 and custom_freq fields, to make TV mode setting logic more
concise and uniform.

Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Comments

Noralf Trønnes Aug. 30, 2022, 3:29 p.m. UTC | #1 
Den 29.08.2022 15.11, skrev Maxime Ripard:
> From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
> 
> 
> 
> Change the mode_set function pointer logic to declarative config0,
> 
> config1 and custom_freq fields, to make TV mode setting logic more
> 
> concise and uniform.
> 
> 
> 
> Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
> 
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> 
> 
> 
> diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
> 
> index 72eee0cbb615..9a37c3fcc295 100644
> 
> --- a/drivers/gpu/drm/vc4/vc4_vec.c
> 
> +++ b/drivers/gpu/drm/vc4/vc4_vec.c
> 
> @@ -194,7 +194,9 @@ enum vc4_vec_tv_mode_id {
> 
>  
> 
>  struct vc4_vec_tv_mode {
> 
>  	const struct drm_display_mode *mode;
> 
> -	void (*mode_set)(struct vc4_vec *vec);
> 
> +	u32 config0;
> 
> +	u32 config1;
> 
> +	u32 custom_freq;
> 
>  };
> 
>  
> 
>  static const struct debugfs_reg32 vec_regs[] = {
> 
> @@ -224,34 +226,6 @@ static const struct debugfs_reg32 vec_regs[] = {
> 
>  	VC4_REG32(VEC_DAC_MISC),
> 
>  };
> 
>  
> 
> -static void vc4_vec_ntsc_mode_set(struct vc4_vec *vec)
> 
> -{
> 
> -	struct drm_device *drm = vec->connector.dev;
> 
> -	int idx;
> 
> -
> 
> -	if (!drm_dev_enter(drm, &idx))
> 
> -		return;
> 
> -
> 
> -	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN);
> 
> -	VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);
> 
> -
> 
> -	drm_dev_exit(idx);
> 
> -}
> 
> -
> 
> -static void vc4_vec_ntsc_j_mode_set(struct vc4_vec *vec)
> 
> -{
> 
> -	struct drm_device *drm = vec->connector.dev;
> 
> -	int idx;
> 
> -
> 
> -	if (!drm_dev_enter(drm, &idx))
> 
> -		return;
> 
> -
> 
> -	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD);
> 
> -	VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);
> 
> -
> 
> -	drm_dev_exit(idx);
> 
> -}
> 
> -
> 
>  static const struct drm_display_mode ntsc_mode = {
> 
>  	DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500,
> 
>  		 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,
> 
> @@ -259,37 +233,6 @@ static const struct drm_display_mode ntsc_mode = {
> 
>  		 DRM_MODE_FLAG_INTERLACE)
> 
>  };
> 
>  
> 
> -static void vc4_vec_pal_mode_set(struct vc4_vec *vec)
> 
> -{
> 
> -	struct drm_device *drm = vec->connector.dev;
> 
> -	int idx;
> 
> -
> 
> -	if (!drm_dev_enter(drm, &idx))
> 
> -		return;
> 
> -
> 
> -	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD);
> 
> -	VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);
> 
> -
> 
> -	drm_dev_exit(idx);
> 
> -}
> 
> -
> 
> -static void vc4_vec_pal_m_mode_set(struct vc4_vec *vec)
> 
> -{
> 
> -	struct drm_device *drm = vec->connector.dev;
> 
> -	int idx;
> 
> -
> 
> -	if (!drm_dev_enter(drm, &idx))
> 
> -		return;
> 
> -
> 
> -	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD);
> 
> -	VEC_WRITE(VEC_CONFIG1,
> 
> -		  VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ);
> 
> -	VEC_WRITE(VEC_FREQ3_2, 0x223b);
> 
> -	VEC_WRITE(VEC_FREQ1_0, 0x61d1);
> 
> -
> 
> -	drm_dev_exit(idx);
> 
> -}
> 
> -
> 
>  static const struct drm_display_mode pal_mode = {
> 
>  	DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500,
> 
>  		 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,
> 
> @@ -300,19 +243,24 @@ static const struct drm_display_mode pal_mode = {
> 
>  static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
> 
>  	[VC4_VEC_TV_MODE_NTSC] = {
> 
>  		.mode = &ntsc_mode,
> 
> -		.mode_set = vc4_vec_ntsc_mode_set,
> 
> +		.config0 = VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN,
> 
> +		.config1 = VEC_CONFIG1_C_CVBS_CVBS,
> 
>  	},
> 
>  	[VC4_VEC_TV_MODE_NTSC_J] = {
> 
>  		.mode = &ntsc_mode,
> 
> -		.mode_set = vc4_vec_ntsc_j_mode_set,
> 
> +		.config0 = VEC_CONFIG0_NTSC_STD,
> 
> +		.config1 = VEC_CONFIG1_C_CVBS_CVBS,
> 
>  	},
> 
>  	[VC4_VEC_TV_MODE_PAL] = {
> 
>  		.mode = &pal_mode,
> 
> -		.mode_set = vc4_vec_pal_mode_set,
> 
> +		.config0 = VEC_CONFIG0_PAL_BDGHI_STD,
> 
> +		.config1 = VEC_CONFIG1_C_CVBS_CVBS,
> 
>  	},
> 
>  	[VC4_VEC_TV_MODE_PAL_M] = {
> 
>  		.mode = &pal_mode,
> 
> -		.mode_set = vc4_vec_pal_m_mode_set,
> 
> +		.config0 = VEC_CONFIG0_PAL_BDGHI_STD,
> 
> +		.config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
> 
> +		.custom_freq = 0x223b61d1,
> 
>  	},
> 
>  };
> 
>  
> 
> @@ -470,7 +418,16 @@ static void vc4_vec_encoder_enable(struct drm_encoder *encoder,
> 
>  	/* Mask all interrupts. */
> 
>  	VEC_WRITE(VEC_MASK0, 0);
> 
>  
> 
> -	vec->tv_mode->mode_set(vec);
> 
> +	VEC_WRITE(VEC_CONFIG0, vec->tv_mode->config0);
> 
> +	VEC_WRITE(VEC_CONFIG1, vec->tv_mode->config1);
> 
> +
> 
> +	if (vec->tv_mode->custom_freq != 0) {

Nit: '!= 0' is not necessary and not common either in kernel code.

Reviewed-by: Noralf Trønnes <noralf@tronnes.org>

> 
> +		VEC_WRITE(VEC_FREQ3_2,
> 
> +			  (vec->tv_mode->custom_freq >> 16) &
> 
> +			  0xffff);
> 
> +		VEC_WRITE(VEC_FREQ1_0,
> 
> +			  vec->tv_mode->custom_freq & 0xffff);
> 
> +	}
> 
>  
> 
>  	VEC_WRITE(VEC_DAC_MISC,
> 
>  		  VEC_DAC_MISC_VID_ACT | VEC_DAC_MISC_DAC_RST_N);
> 
> 
>
Maxime Ripard Sept. 7, 2022, 8:35 a.m. UTC | #2 
On Mon, 29 Aug 2022 15:11:40 +0200, Maxime Ripard wrote:
> From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
> 
> Change the mode_set function pointer logic to declarative config0,
> config1 and custom_freq fields, to make TV mode setting logic more
> concise and uniform.
> 
> 
> [...]

Applied to drm/drm-misc (drm-misc-next).

Thanks!
Maxime
diff mbox series

Patch

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 72eee0cbb615..9a37c3fcc295 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -194,7 +194,9 @@  enum vc4_vec_tv_mode_id {
 
 struct vc4_vec_tv_mode {
 	const struct drm_display_mode *mode;
-	void (*mode_set)(struct vc4_vec *vec);
+	u32 config0;
+	u32 config1;
+	u32 custom_freq;
 };
 
 static const struct debugfs_reg32 vec_regs[] = {
@@ -224,34 +226,6 @@  static const struct debugfs_reg32 vec_regs[] = {
 	VC4_REG32(VEC_DAC_MISC),
 };
 
-static void vc4_vec_ntsc_mode_set(struct vc4_vec *vec)
-{
-	struct drm_device *drm = vec->connector.dev;
-	int idx;
-
-	if (!drm_dev_enter(drm, &idx))
-		return;
-
-	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN);
-	VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);
-
-	drm_dev_exit(idx);
-}
-
-static void vc4_vec_ntsc_j_mode_set(struct vc4_vec *vec)
-{
-	struct drm_device *drm = vec->connector.dev;
-	int idx;
-
-	if (!drm_dev_enter(drm, &idx))
-		return;
-
-	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD);
-	VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);
-
-	drm_dev_exit(idx);
-}
-
 static const struct drm_display_mode ntsc_mode = {
 	DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500,
 		 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,
@@ -259,37 +233,6 @@  static const struct drm_display_mode ntsc_mode = {
 		 DRM_MODE_FLAG_INTERLACE)
 };
 
-static void vc4_vec_pal_mode_set(struct vc4_vec *vec)
-{
-	struct drm_device *drm = vec->connector.dev;
-	int idx;
-
-	if (!drm_dev_enter(drm, &idx))
-		return;
-
-	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD);
-	VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);
-
-	drm_dev_exit(idx);
-}
-
-static void vc4_vec_pal_m_mode_set(struct vc4_vec *vec)
-{
-	struct drm_device *drm = vec->connector.dev;
-	int idx;
-
-	if (!drm_dev_enter(drm, &idx))
-		return;
-
-	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD);
-	VEC_WRITE(VEC_CONFIG1,
-		  VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ);
-	VEC_WRITE(VEC_FREQ3_2, 0x223b);
-	VEC_WRITE(VEC_FREQ1_0, 0x61d1);
-
-	drm_dev_exit(idx);
-}
-
 static const struct drm_display_mode pal_mode = {
 	DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500,
 		 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,
@@ -300,19 +243,24 @@  static const struct drm_display_mode pal_mode = {
 static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
 	[VC4_VEC_TV_MODE_NTSC] = {
 		.mode = &ntsc_mode,
-		.mode_set = vc4_vec_ntsc_mode_set,
+		.config0 = VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN,
+		.config1 = VEC_CONFIG1_C_CVBS_CVBS,
 	},
 	[VC4_VEC_TV_MODE_NTSC_J] = {
 		.mode = &ntsc_mode,
-		.mode_set = vc4_vec_ntsc_j_mode_set,
+		.config0 = VEC_CONFIG0_NTSC_STD,
+		.config1 = VEC_CONFIG1_C_CVBS_CVBS,
 	},
 	[VC4_VEC_TV_MODE_PAL] = {
 		.mode = &pal_mode,
-		.mode_set = vc4_vec_pal_mode_set,
+		.config0 = VEC_CONFIG0_PAL_BDGHI_STD,
+		.config1 = VEC_CONFIG1_C_CVBS_CVBS,
 	},
 	[VC4_VEC_TV_MODE_PAL_M] = {
 		.mode = &pal_mode,
-		.mode_set = vc4_vec_pal_m_mode_set,
+		.config0 = VEC_CONFIG0_PAL_BDGHI_STD,
+		.config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
+		.custom_freq = 0x223b61d1,
 	},
 };
 
@@ -470,7 +418,16 @@  static void vc4_vec_encoder_enable(struct drm_encoder *encoder,
 	/* Mask all interrupts. */
 	VEC_WRITE(VEC_MASK0, 0);
 
-	vec->tv_mode->mode_set(vec);
+	VEC_WRITE(VEC_CONFIG0, vec->tv_mode->config0);
+	VEC_WRITE(VEC_CONFIG1, vec->tv_mode->config1);
+
+	if (vec->tv_mode->custom_freq != 0) {
+		VEC_WRITE(VEC_FREQ3_2,
+			  (vec->tv_mode->custom_freq >> 16) &
+			  0xffff);
+		VEC_WRITE(VEC_FREQ1_0,
+			  vec->tv_mode->custom_freq & 0xffff);
+	}
 
 	VEC_WRITE(VEC_DAC_MISC,
 		  VEC_DAC_MISC_VID_ACT | VEC_DAC_MISC_DAC_RST_N);