diff mbox series

[v3] soc: imx: gpcv2: Assert reset before ungating clock

Message ID 20220812170802.205244-1-marex@denx.de (mailing list archive)
State New, archived
Headers show
Series [v3] soc: imx: gpcv2: Assert reset before ungating clock | expand

Commit Message

Marek Vasut Aug. 12, 2022, 5:08 p.m. UTC
In case the power domain clock are ungated before the reset is asserted,
the system might freeze completely. This is likely due to a device is an
undefined state being attached to bus, which sporadically leads to a bus
hang. Assert the reset before the clock are enabled to assure the device
is in defined state before being attached to bus.

Fixes: fe58c887fb8ca ("soc: imx: gpcv2: add support for optional resets")
Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: Fabio Estevam <festevam@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
---
V2: - Always assert the reset before enabling clock
    - Update commit message
    - Add Fixes tag
V3: Move the extra delay past clk_prepare_enable()
---
 drivers/soc/imx/gpcv2.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Fabio Estevam Aug. 13, 2022, 11:38 a.m. UTC | #1
Hi Marek,

On 12/08/2022 14:08, Marek Vasut wrote:
> In case the power domain clock are ungated before the reset is 
> asserted,
> the system might freeze completely. This is likely due to a device is 
> an
> undefined state being attached to bus, which sporadically leads to a 
> bus
> hang. Assert the reset before the clock are enabled to assure the 
> device
> is in defined state before being attached to bus.
> 
> Fixes: fe58c887fb8ca ("soc: imx: gpcv2: add support for optional 
> resets")
> Signed-off-by: Marek Vasut <marex@denx.de>

Reviewed-by: Fabio Estevam <festevam@denx.de>
Lucas Stach Aug. 15, 2022, 7:53 a.m. UTC | #2
Am Freitag, dem 12.08.2022 um 19:08 +0200 schrieb Marek Vasut:
> In case the power domain clock are ungated before the reset is asserted,
> the system might freeze completely. This is likely due to a device is an
> undefined state being attached to bus, which sporadically leads to a bus
> hang. Assert the reset before the clock are enabled to assure the device
> is in defined state before being attached to bus.
> 
> Fixes: fe58c887fb8ca ("soc: imx: gpcv2: add support for optional resets")
> Signed-off-by: Marek Vasut <marex@denx.de>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
> Cc: Fabio Estevam <festevam@denx.de>
> Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Shawn Guo <shawnguo@kernel.org>
> To: linux-arm-kernel@lists.infradead.org
> ---
> V2: - Always assert the reset before enabling clock
>     - Update commit message
>     - Add Fixes tag
> V3: Move the extra delay past clk_prepare_enable()
> ---
>  drivers/soc/imx/gpcv2.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
> index 6383a4edc3607..88aee59730e39 100644
> --- a/drivers/soc/imx/gpcv2.c
> +++ b/drivers/soc/imx/gpcv2.c
> @@ -335,6 +335,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
>  		}
>  	}
>  
> +	reset_control_assert(domain->reset);
> +
>  	/* Enable reset clocks for all devices in the domain */
>  	ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
>  	if (ret) {
> @@ -342,7 +344,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
>  		goto out_regulator_disable;
>  	}
>  
> -	reset_control_assert(domain->reset);
> +	/* delays for reset to propagate */
> +	udelay(5);
>  
>  	if (domain->bits.pxx) {
>  		/* request the domain to power up */
Shawn Guo Aug. 21, 2022, 1:35 p.m. UTC | #3
On Fri, Aug 12, 2022 at 07:08:02PM +0200, Marek Vasut wrote:
> In case the power domain clock are ungated before the reset is asserted,
> the system might freeze completely. This is likely due to a device is an
> undefined state being attached to bus, which sporadically leads to a bus
> hang. Assert the reset before the clock are enabled to assure the device
> is in defined state before being attached to bus.
> 
> Fixes: fe58c887fb8ca ("soc: imx: gpcv2: add support for optional resets")
> Signed-off-by: Marek Vasut <marex@denx.de>

Applied, thanks!
diff mbox series

Patch

diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 6383a4edc3607..88aee59730e39 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -335,6 +335,8 @@  static int imx_pgc_power_up(struct generic_pm_domain *genpd)
 		}
 	}
 
+	reset_control_assert(domain->reset);
+
 	/* Enable reset clocks for all devices in the domain */
 	ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
 	if (ret) {
@@ -342,7 +344,8 @@  static int imx_pgc_power_up(struct generic_pm_domain *genpd)
 		goto out_regulator_disable;
 	}
 
-	reset_control_assert(domain->reset);
+	/* delays for reset to propagate */
+	udelay(5);
 
 	if (domain->bits.pxx) {
 		/* request the domain to power up */