From patchwork Mon Aug 22 23:20:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 12951459 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4FB02C28D13 for ; Mon, 22 Aug 2022 23:22:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fNWmPWg5m03hRwvTEDi3X/+NVaiaNMk/TlGO3y2jd5Y=; b=uFdiZURT7jiJbs wuQOG3HiHl1erqodwe8/Ce0juaws8yS3E6h5iO3hfOMl+0v59tvcFIsCHTPf5MdTqdrH0MN0/LfoB 9fkcdOoiCfbENx2vJxE5iYr7efmsUJ7YfHCIO1AyL3DmJM1Y2tHlzAzOxz0U4x9GtO+YuS6l8FuAQ j9wQB4bIvMY4xd8o21zgvZIDf9aeUBzG5IbiVohOolVwN5akNyvQCn3IZpXvHbFg4I4w5t5znRtzU TbWelQwKZxqjLtLyQFkshJxIyy00CvLKLK8K7k5kzhPbOrG1xxMGRv1ACpqYhkFfo/+cQ2jv4fIJZ syJL9UnCb2RWLKlg+6tA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oQGjA-00FsdL-DJ; Mon, 22 Aug 2022 23:21:04 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oQGj7-00FsXe-8A for linux-arm-kernel@lists.infradead.org; Mon, 22 Aug 2022 23:21:02 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 27MNKlD1095371; Mon, 22 Aug 2022 18:20:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1661210447; bh=C0FWmK5NWDetoYxTMdBSgA+aZlJ6uevaafIo09ZQuZU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yuhUBge02UEvwbeSkVrCFb4nJ2jpTUKB/569BGKiY1uPpbGPJ2mO5gL3UT8ZjDiUY gWTfpbsFEnQz3vHtvY29fkTtsflyAfi9B5wqbM+0EOqWOo/d91E9CTW6rD2mrgalUo G2iiUrDVvM7z8uUyDeAyi1zz7EyNZEGP90iLGbDU= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 27MNKlMe019768 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 22 Aug 2022 18:20:47 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 22 Aug 2022 18:20:47 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 22 Aug 2022 18:20:47 -0500 Received: from ula0226330.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 27MNKkkR122207; Mon, 22 Aug 2022 18:20:46 -0500 From: Andrew Davis To: Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , , , CC: Andrew Davis Subject: [PATCH 1/2] ARM: nspire: Use syscon-reboot to handle restart Date: Mon, 22 Aug 2022 18:20:45 -0500 Message-ID: <20220822232046.1230-2-afd@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220822232046.1230-1-afd@ti.com> References: <20220822232046.1230-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220822_162101_521744_C0504FF6 X-CRM114-Status: GOOD ( 13.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Writing this bit can be handled by the syscon-reboot driver. Add the info to DT and remove the machine_desc version. Signed-off-by: Andrew Davis Reviewed-by: Linus Walleij --- arch/arm/boot/dts/nspire.dtsi | 7 +++++++ arch/arm/mach-nspire/Kconfig | 2 ++ arch/arm/mach-nspire/mmio.h | 3 --- arch/arm/mach-nspire/nspire.c | 10 ---------- 4 files changed, 9 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index bb240e6a3a6f..6357b803521e 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -172,7 +172,14 @@ rtc: rtc@90090000 { }; misc: misc@900a0000 { + compatible = "syscon", "simple-mfd"; reg = <0x900a0000 0x1000>; + + reboot { + compatible = "syscon-reboot"; + offset = <0x08>; + value = <0x02>; + }; }; pwr: pwr@900b0000 { diff --git a/arch/arm/mach-nspire/Kconfig b/arch/arm/mach-nspire/Kconfig index eb9916233dea..37e2dae60c2b 100644 --- a/arch/arm/mach-nspire/Kconfig +++ b/arch/arm/mach-nspire/Kconfig @@ -9,5 +9,7 @@ config ARCH_NSPIRE select ARM_VIC select ARM_TIMER_SP804 select NSPIRE_TIMER + select POWER_RESET + select POWER_RESET_SYSCON help This enables support for systems using the TI-NSPIRE CPU diff --git a/arch/arm/mach-nspire/mmio.h b/arch/arm/mach-nspire/mmio.h index 48e32f13f311..2ce0656139ec 100644 --- a/arch/arm/mach-nspire/mmio.h +++ b/arch/arm/mach-nspire/mmio.h @@ -5,9 +5,6 @@ * Copyright (C) 2013 Daniel Tang */ -#define NSPIRE_MISC_PHYS_BASE 0x900A0000 -#define NSPIRE_MISC_HWRESET 0x08 - #define NSPIRE_PWR_PHYS_BASE 0x900B0000 #define NSPIRE_PWR_VIRT_BASE 0xFEEB0000 #define NSPIRE_PWR_BUS_DISABLE1 0x18 diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c index 2d4abb0288b9..1e13337972dd 100644 --- a/arch/arm/mach-nspire/nspire.c +++ b/arch/arm/mach-nspire/nspire.c @@ -27,16 +27,6 @@ static const char *const nspire_dt_match[] __initconst = { NULL, }; -static void nspire_restart(enum reboot_mode mode, const char *cmd) -{ - void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K); - if (!base) - return; - - writel(2, base + NSPIRE_MISC_HWRESET); -} - DT_MACHINE_START(NSPIRE, "TI-NSPIRE") .dt_compat = nspire_dt_match, - .restart = nspire_restart, MACHINE_END