| Message ID | 20220824231200.494-8-leoyang.li@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | accumulated dts updates for ls1046a | expand |
On Wed, Aug 24, 2022 at 06:11:58PM -0500, Li Yang wrote: > Add scl-gpios property for i2c recovery and add SoC specific compatible > string for SoC specific fixup. > > Signed-off-by: Zhang Ying <ying.zhang22455@nxp.com> > Signed-off-by: Li Yang <leoyang.li@nxp.com> > --- > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > index c7c6c82626fd..c95a990e2edd 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > @@ -502,7 +502,7 @@ dspi: spi@2100000 { > }; > > i2c0: i2c@2180000 { > - compatible = "fsl,vf610-i2c"; > + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; > #address-cells = <1>; > #size-cells = <0>; > reg = <0x0 0x2180000 0x0 0x10000>; > @@ -516,35 +516,38 @@ i2c0: i2c@2180000 { > }; > > i2c1: i2c@2190000 { > - compatible = "fsl,vf610-i2c"; > + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; > #address-cells = <1>; > #size-cells = <0>; > reg = <0x0 0x2190000 0x0 0x10000>; > interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL > QORIQ_CLK_PLL_DIV(2)>; > + scl-gpios = <&gpio3 2 0>; Use define for polarity cell? Shawn > status = "disabled"; > }; > > i2c2: i2c@21a0000 { > - compatible = "fsl,vf610-i2c"; > + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; > #address-cells = <1>; > #size-cells = <0>; > reg = <0x0 0x21a0000 0x0 0x10000>; > interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL > QORIQ_CLK_PLL_DIV(2)>; > + scl-gpios = <&gpio3 10 0>; > status = "disabled"; > }; > > i2c3: i2c@21b0000 { > - compatible = "fsl,vf610-i2c"; > + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; > #address-cells = <1>; > #size-cells = <0>; > reg = <0x0 0x21b0000 0x0 0x10000>; > interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL > QORIQ_CLK_PLL_DIV(2)>; > + scl-gpios = <&gpio3 12 0>; > status = "disabled"; > }; > > -- > 2.37.1 >
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index c7c6c82626fd..c95a990e2edd 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -502,7 +502,7 @@ dspi: spi@2100000 { }; i2c0: i2c@2180000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; @@ -516,35 +516,38 @@ i2c0: i2c@2180000 { }; i2c1: i2c@2190000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; + scl-gpios = <&gpio3 2 0>; status = "disabled"; }; i2c2: i2c@21a0000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x21a0000 0x0 0x10000>; interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; + scl-gpios = <&gpio3 10 0>; status = "disabled"; }; i2c3: i2c@21b0000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,ls1046a-i2c", "fsl,vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x21b0000 0x0 0x10000>; interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; + scl-gpios = <&gpio3 12 0>; status = "disabled"; };