@@ -362,6 +362,37 @@ i2c3: i2c@40005c00 {
status = "disabled";
};
+ can: can@40006400 {
+ compatible = "st,stm32f4-bxcan-core";
+ reg = <0x40006400 0x800>;
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ can1: can@0 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x0>;
+ interrupts = <19>, <20>, <21>, <22>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ st,can-master;
+ status = "disabled";
+ };
+
+ can2: can@400 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x400>;
+ interrupts = <63>, <64>, <65>, <66>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN2)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
+ status = "disabled";
+ };
+ };
+
dac: dac@40007400 {
compatible = "st,stm32f4-dac-core";
reg = <0x40007400 0x400>;
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the master and CAN2 the slave, that share some of the required logic like clock and filters. This means that the slave CAN can't be used without the master CAN. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> --- Changes in v3: - Remove 'Dario Binacchi <dariobin@libero.it>' SOB. - Add "clocks" to can@0 node. arch/arm/boot/dts/stm32f429.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)