diff mbox series

[v3,1/1] arm64: dts: tqma8mpql: add USB DR support

Message ID 20220905073730.199462-1-alexander.stein@ew.tq-group.com (mailing list archive)
State New, archived
Headers show
Series [v3,1/1] arm64: dts: tqma8mpql: add USB DR support | expand

Commit Message

Alexander Stein Sept. 5, 2022, 7:37 a.m. UTC
Add support for USB DR on USB1 interface. Host/Device detection is done
using the usb-role-switch connector.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
Changes in v3:
* Moved pinctrl to USB glue layer node
* Ordered nodes alphabetically

Changes in v2:
* Split from previous series
* For now enable USB OTG only

 .../freescale/imx8mp-tqma8mpql-mba8mpxl.dts   | 48 +++++++++++++++++++
 1 file changed, 48 insertions(+)

Comments

Fabio Estevam Sept. 5, 2022, 12:27 p.m. UTC | #1
On Mon, Sep 5, 2022 at 4:37 AM Alexander Stein
<alexander.stein@ew.tq-group.com> wrote:
>
> Add support for USB DR on USB1 interface. Host/Device detection is done
> using the usb-role-switch connector.
>
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Jun Li Sept. 6, 2022, 2:10 a.m. UTC | #2
> -----Original Message-----
> From: Alexander Stein <alexander.stein@ew.tq-group.com>
> Sent: Monday, September 5, 2022 3:38 PM
> To: Shawn Guo <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Alexander Stein <alexander.stein@ew.tq-group.com>; Pengutronix Kernel
> Team <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>;
> dl-linux-imx <linux-imx@nxp.com>; devicetree@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; tharvey@gateworks.com; Jun Li
> <jun.li@nxp.com>
> Subject: [PATCH v3 1/1] arm64: dts: tqma8mpql: add USB DR support
> 
> Add support for USB DR on USB1 interface. Host/Device detection is done using
> the usb-role-switch connector.
> 
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>

Reviewed-by: Li Jun <jun.li@nxp.com>

> ---
> Changes in v3:
> * Moved pinctrl to USB glue layer node
> * Ordered nodes alphabetically
> 
> Changes in v2:
> * Split from previous series
> * For now enable USB OTG only
> 
>  .../freescale/imx8mp-tqma8mpql-mba8mpxl.dts   | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
> b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
> index d8ca52976170..88579e8ac93b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
> @@ -139,6 +139,13 @@ reg_vcc_3v3: regulator-3v3 {
>  		regulator-max-microvolt = <3300000>;
>  	};
> 
> +	reg_vcc_5v0: regulator-5v0 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC_5V0";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +	};
> +
>  	reserved-memory {
>  		#address-cells = <2>;
>  		#size-cells = <2>;
> @@ -445,6 +452,38 @@ &uart4 {
>  	status = "okay";
>  };
> 
> +&usb3_0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usb0>;
> +	fsl,over-current-active-low;
> +	status = "okay";
> +};
> +
> +&usb3_phy0 {
> +	vbus-supply = <&reg_vcc_5v0>;
> +	status = "okay";
> +};
> +
> +&usb_dwc3_0 {
> +	/* dual role is implemented, but not a full featured OTG */
> +	hnp-disable;
> +	srp-disable;
> +	adp-disable;
> +	dr_mode = "otg";
> +	usb-role-switch;
> +	role-switch-default-mode = "peripheral";
> +	status = "okay";
> +
> +	connector {
> +		compatible = "gpio-usb-b-connector", "usb-b-connector";
> +		type = "micro";
> +		label = "X29";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_usbcon0>;
> +		id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
> +	};
> +};
> +
>  &usdhc2 {
>  	pinctrl-names = "default", "state_100mhz", "state_200mhz";
>  	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; @@ -666,6
> +705,15 @@ pinctrl_uart4: uart4grp {
>  			   <MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX	0x140>;
>  	};
> 
> +	pinctrl_usb0: usb0grp {
> +		fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC	0x1c0>,
> +			   <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR	0x1c0>;
> +	};
> +
> +	pinctrl_usbcon0: usb0congrp {
> +		fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10		0x1c0>;
> +	};
> +
>  	pinctrl_usdhc2: usdhc2grp {
>  		fsl,pins = <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x192>,
>  			   <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d2>,
> --
> 2.25.1
Shawn Guo Sept. 6, 2022, 2:15 a.m. UTC | #3
On Mon, Sep 05, 2022 at 09:37:30AM +0200, Alexander Stein wrote:
> Add support for USB DR on USB1 interface. Host/Device detection is done
> using the usb-role-switch connector.
> 
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>

Applied, thanks!
Ahmad Fatoum Oct. 14, 2022, 2:18 p.m. UTC | #4
Hello Alexander,

On 05.09.22 09:37, Alexander Stein wrote:
> +	pinctrl_usb0: usb0grp {
> +		fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC	0x1c0>,
> +			   <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR	0x1c0>;
> +	};
> +
> +	pinctrl_usbcon0: usb0congrp {
> +		fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10		0x1c0>;
> +	};

I am wondering: You can mux for MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID,
why did you decide against using the hardware function here?

Cheers,
Ahmad
Tim Harvey Oct. 17, 2022, 7:30 p.m. UTC | #5
On Fri, Oct 14, 2022 at 7:18 AM Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:
>
> Hello Alexander,
>
> On 05.09.22 09:37, Alexander Stein wrote:
> > +     pinctrl_usb0: usb0grp {
> > +             fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC        0x1c0>,
> > +                        <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR       0x1c0>;
> > +     };
> > +
> > +     pinctrl_usbcon0: usb0congrp {
> > +             fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10         0x1c0>;
> > +     };
>
> I am wondering: You can mux for MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID,
> why did you decide against using the hardware function here?
>

Ahmad,

The IMX8MP USB OTG_ID pins are internally not connected. I can't
recall where this is mentioned but due to this they can not be used to
select host/device mode.

Best Regards,

Tim
Ahmad Fatoum Oct. 17, 2022, 7:40 p.m. UTC | #6
Hello Tim,

On 17.10.22 21:30, Tim Harvey wrote:
> On Fri, Oct 14, 2022 at 7:18 AM Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:
>>
>> Hello Alexander,
>>
>> On 05.09.22 09:37, Alexander Stein wrote:
>>> +     pinctrl_usb0: usb0grp {
>>> +             fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC        0x1c0>,
>>> +                        <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR       0x1c0>;
>>> +     };
>>> +
>>> +     pinctrl_usbcon0: usb0congrp {
>>> +             fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10         0x1c0>;
>>> +     };
>>
>> I am wondering: You can mux for MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID,
>> why did you decide against using the hardware function here?
>>
> 
> Ahmad,
> 
> The IMX8MP USB OTG_ID pins are internally not connected. I can't
> recall where this is mentioned but due to this they can not be used to
> select host/device mode.

Thanks for the info. Do you know if this issue exists with the i.MX8MN as
well? A colleague had trouble bringing up the OTG_ID HW function and I assume
it may be the same issue. I am unsure though, because the imx8mn-tqma8mqnl-mba8mx.dts
muxes the pad as OTG_ID.

Cheers,
Ahmad

> 
> Best Regards,
> 
> Tim
>
Jun Li Oct. 18, 2022, 1:58 a.m. UTC | #7
> -----Original Message-----
> From: Tim Harvey <tharvey@gateworks.com>
> Sent: Tuesday, October 18, 2022 3:31 AM
> To: Ahmad Fatoum <a.fatoum@pengutronix.de>
> Cc: Alexander Stein <alexander.stein@ew.tq-group.com>; Shawn Guo
> <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
> devicetree@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>; Pengutronix
> Kernel Team <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>;
> linux-arm-kernel@lists.infradead.org; Jun Li <jun.li@nxp.com>
> Subject: Re: [PATCH v3 1/1] arm64: dts: tqma8mpql: add USB DR support
> 
> On Fri, Oct 14, 2022 at 7:18 AM Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:
> >
> > Hello Alexander,
> >
> > On 05.09.22 09:37, Alexander Stein wrote:
> > > +     pinctrl_usb0: usb0grp {
> > > +             fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC
> 0x1c0>,
> > > +                        <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR
> 0x1c0>;
> > > +     };
> > > +
> > > +     pinctrl_usbcon0: usb0congrp {
> > > +             fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10
> 0x1c0>;
> > > +     };
> >
> > I am wondering: You can mux for MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID,
> > why did you decide against using the hardware function here?
> >
> 
> Ahmad,
> 
> The IMX8MP USB OTG_ID pins are internally not connected. I can't recall where
> this is mentioned but due to this they can not be used to select host/device
> mode.

There is no *OTG* block in iMX8MP HW due to dwc3 IP upgrade, the OTG ID pin
cannot generate a normal USB irq for host/device selection, instead, we can
use GPIO function to generate ID state change event for it, this is well
supported via usb-conn-gpio.c like this patch is using.

Li Jun
  
> 
> Best Regards,
> 
> Tim
Jun Li Oct. 18, 2022, 2:07 a.m. UTC | #8
> -----Original Message-----
> From: Ahmad Fatoum <a.fatoum@pengutronix.de>
> Sent: Tuesday, October 18, 2022 3:41 AM
> To: tharvey@gateworks.com
> Cc: Alexander Stein <alexander.stein@ew.tq-group.com>; Shawn Guo
> <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
> devicetree@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>; Pengutronix
> Kernel Team <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>;
> linux-arm-kernel@lists.infradead.org; Jun Li <jun.li@nxp.com>
> Subject: Re: [PATCH v3 1/1] arm64: dts: tqma8mpql: add USB DR support
> 
> Hello Tim,
> 
> On 17.10.22 21:30, Tim Harvey wrote:
> > On Fri, Oct 14, 2022 at 7:18 AM Ahmad Fatoum <a.fatoum@pengutronix.de>
> wrote:
> >>
> >> Hello Alexander,
> >>
> >> On 05.09.22 09:37, Alexander Stein wrote:
> >>> +     pinctrl_usb0: usb0grp {
> >>> +             fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC
> 0x1c0>,
> >>> +                        <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR
> 0x1c0>;
> >>> +     };
> >>> +
> >>> +     pinctrl_usbcon0: usb0congrp {
> >>> +             fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10
> 0x1c0>;
> >>> +     };
> >>
> >> I am wondering: You can mux for MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID,
> >> why did you decide against using the hardware function here?
> >>
> >
> > Ahmad,
> >
> > The IMX8MP USB OTG_ID pins are internally not connected. I can't
> > recall where this is mentioned but due to this they can not be used to
> > select host/device mode.
> 
> Thanks for the info. Do you know if this issue exists with the i.MX8MN as
> well? A colleague had trouble bringing up the OTG_ID HW function and I assume
> it may be the same issue. I am unsure though, because the
> imx8mn-tqma8mqnl-mba8mx.dts muxes the pad as OTG_ID.

No, iMX8MN is completely different IP(USB2 only) than iMX8MP, iMX8MN
has *OTG* inside so the ID functionality should be fine, what's the
trouble you colleague had?

Li Jun
 
> 
> Cheers,
> Ahmad
> 
> >
> > Best Regards,
> >
> > Tim
> >
> 
> 
> --
> Pengutronix e.K.                           |                             |
> Steuerwalder Str. 21                       |
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Ahmad Fatoum Oct. 24, 2022, 1:46 p.m. UTC | #9
Hello,

On 18.10.22 04:07, Jun Li wrote:
>> -----Original Message-----
>> From: Ahmad Fatoum <a.fatoum@pengutronix.de>
>> Thanks for the info. Do you know if this issue exists with the i.MX8MN as
>> well? A colleague had trouble bringing up the OTG_ID HW function and I assume
>> it may be the same issue. I am unsure though, because the
>> imx8mn-tqma8mqnl-mba8mx.dts muxes the pad as OTG_ID.
> 
> No, iMX8MN is completely different IP(USB2 only) than iMX8MP, iMX8MN
> has *OTG* inside so the ID functionality should be fine, what's the
> trouble you colleague had?

I see. Problem was that changes to the OTG pins were not detected
on an i.MX8MN-based board, despite the colleague being sure that
OTG controller registers were set correctly.. I'll have to catch up with
him for more info. My current suspicion is that it may have been
runtime-suspend related.

I'll ask him to test again with your series separating USB/HSIO PDs.

  https://lore.kernel.org/all/1664192735-14313-1-git-send-email-jun.li@nxp.com/

We had a udev rule already, which I tested working on an i.MX8MM:

  SUBSYSTEM=="platform", ACTION=="add", DRIVER=="imx_usb", ATTR{power/control}="on"

But apparently something is still amiss.

Thanks for the help everybody,
Ahmad

> 
> Li Jun
>  
>>
>> Cheers,
>> Ahmad
>>
>>>
>>> Best Regards,
>>>
>>> Tim
>>>
>>
>>
>> --
>> Pengutronix e.K.                           |                             |
>> Steuerwalder Str. 21                       |
>> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.pe
>> ngutronix.de%2F&amp;data=05%7C01%7Cjun.li%40nxp.com%7Cac32a99803dc4e710
>> 4d408dab0777a15%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6380163244
>> 44837508%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLC
>> JBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&amp;sdata=4TFBorG%2BucyYuy
>> HrwhTDxjz4GV3%2FsCaHzx7i4cdw5Zw%3D&amp;reserved=0  |
>> 31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
>> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
> 
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
index d8ca52976170..88579e8ac93b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
@@ -139,6 +139,13 @@  reg_vcc_3v3: regulator-3v3 {
 		regulator-max-microvolt = <3300000>;
 	};
 
+	reg_vcc_5v0: regulator-5v0 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC_5V0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
 	reserved-memory {
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -445,6 +452,38 @@  &uart4 {
 	status = "okay";
 };
 
+&usb3_0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb0>;
+	fsl,over-current-active-low;
+	status = "okay";
+};
+
+&usb3_phy0 {
+	vbus-supply = <&reg_vcc_5v0>;
+	status = "okay";
+};
+
+&usb_dwc3_0 {
+	/* dual role is implemented, but not a full featured OTG */
+	hnp-disable;
+	srp-disable;
+	adp-disable;
+	dr_mode = "otg";
+	usb-role-switch;
+	role-switch-default-mode = "peripheral";
+	status = "okay";
+
+	connector {
+		compatible = "gpio-usb-b-connector", "usb-b-connector";
+		type = "micro";
+		label = "X29";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usbcon0>;
+		id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+	};
+};
+
 &usdhc2 {
 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
 	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
@@ -666,6 +705,15 @@  pinctrl_uart4: uart4grp {
 			   <MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX	0x140>;
 	};
 
+	pinctrl_usb0: usb0grp {
+		fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC	0x1c0>,
+			   <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR	0x1c0>;
+	};
+
+	pinctrl_usbcon0: usb0congrp {
+		fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10		0x1c0>;
+	};
+
 	pinctrl_usdhc2: usdhc2grp {
 		fsl,pins = <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x192>,
 			   <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d2>,