From patchwork Tue Sep 6 13:55:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiu Moga X-Patchwork-Id: 12967655 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CBCE1ECAAD5 for ; Tue, 6 Sep 2022 14:45:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QZByZUvlkdc8F7mJtmpNac2+qpE1EZGOCF4R75Lc+TA=; b=vG10s6/zSb1L40 Zns1Z6ZnLDDLVARKgUb+Qx2ll+FaNbNVzgjMPmFDndPNNsSkgHG3eL1IYWADYfsq4iFej74HyoBDk Yn0mikZBZTH/ci0/Xlgzg/qnAMY01yJC6U+nSiysipPFcYJFfKfLPiLZNvIg2KQoAa9/GAm6uEzQ+ 6OEJ96pWnOjVb4oMKOzPfZcws3fc6s98vyCjQbh6LZCSkbdEoAlNVhKbX76j/g5lq6m6aZOBZxvNY 1Dqvyd4muPJ0UVrKlyF7FdVd3A1XVR0lSFpF6pcQ3J4AVl/PU1N9IT0Y8BjYD0+q72AE4+FwIeZ4T 7SV7n1TNX9UD6WqCM1VQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZnY-00EPao-GY; Tue, 06 Sep 2022 14:43:32 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZ4H-00E3sJ-37 for linux-arm-kernel@lists.infradead.org; Tue, 06 Sep 2022 13:56:46 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662472604; x=1694008604; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UsqJGlEdc6MmAq/temRPHof8NeB6n1P0o0Ib1Kl4G+I=; b=EZQf3ym/yH8UZ6Wsr6OaljQGWjtagrWjxFO0ikoTTqTTNzDfuX5ZnL/A QASvJaSKVYat+2ojnQmi06GPR2oZvSq7v/Hd7tWtgoxBSztm9p679FBSv piAqikuPOMUHc29SPQ3bONOVyP7WSpeSc7eFMcH1LRIIPujabvTMdrJSv /ZUXqj+afnJ1Mgj4iepO7sEQO5S395k9LBO/I1Q0CWwhBfHnvDuhvh/h2 FlXmZxvQ3XY0s6hAXi+Phi5CKMNUamBIXZ1GV4n9DEebtyYQNPLjZSjSq Hl4O1LRo1zDclfG033YDTP7vv8ystG5ve/Zm5K6e8VvsLqCt0aX9IHb1A A==; X-IronPort-AV: E=Sophos;i="5.93,294,1654585200"; d="scan'208";a="189613821" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Sep 2022 06:56:44 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 6 Sep 2022 06:56:44 -0700 Received: from ROB-ULT-M68701.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 6 Sep 2022 06:56:39 -0700 From: Sergiu Moga To: , , , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v2 02/13] ARM: dts: at91: sama7g5: Swap rx and tx for spi11 Date: Tue, 6 Sep 2022 16:55:01 +0300 Message-ID: <20220906135511.144725-3-sergiu.moga@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906135511.144725-1-sergiu.moga@microchip.com> References: <20220906135511.144725-1-sergiu.moga@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_065645_194069_4B150587 X-CRM114-Status: UNSURE ( 9.51 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Swap the rx and tx of the DMA related DT properties of the spi11 node in order to maintain consistency across Microchip/Atmel SoC files. Signed-off-by: Sergiu Moga --- v1 -> v2: - Nothing, this patch was not here before arch/arm/boot/dts/sama7g5.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index bb6d71e6dfeb..249f9c640b6c 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -866,9 +866,9 @@ spi11: spi@400 { #address-cells = <1>; #size-cells = <0>; atmel,fifo-size = <32>; - dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>, - <&dma0 AT91_XDMAC_DT_PERID(28)>; - dma-names = "rx", "tx"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(28)>, + <&dma0 AT91_XDMAC_DT_PERID(27)>; + dma-names = "tx", "rx"; status = "disabled"; }; };