From patchwork Thu Sep 8 17:11:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12970372 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AC065C38145 for ; Thu, 8 Sep 2022 17:13:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BYu1BUdMo2700qYMLNbHOCNYcyKihAZSM6NG6mt3zb0=; b=CN7Zt2+XX15fAX JgymSeMsetv131JvfyEpTf57z2DDt6YoxUoaY3J9jlae8YzbQYEpG9TJEGhMLPOTeQbTjKZbPmD80 DXGsXxai6pgKp4198wnfgoNa/8GAFQ5LqDyUoNKOprAkvYkxffGPCFOlaWco+uDzyFgBofwwK4+wJ d/xryTfk48B5vv0F6/iL64eleMviBR49B9051EblWxJvyeX2RvaiZUDRN+LWaq7ZY8RMBj/5gA3dT Y+lRtjYsDhRaEkg9eUvaJVKGyhyxXuhJ0g3URE4hGB9zxIXxrwMFeG3SkpHN2HW7jeRuNl9JaOnOj DpOzcREDdMHkSZ2tl4vQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWL4s-006A4L-9X; Thu, 08 Sep 2022 17:12:34 +0000 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWL4L-0069ZV-TZ; Thu, 08 Sep 2022 17:12:03 +0000 Received: from notapiano.myfiosgateway.com (unknown [70.107.189.129]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 0AACD6601FA8; Thu, 8 Sep 2022 18:11:58 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1662657120; bh=tCLoDMHCGsfN19AdOHQQnTF1e0UrnGsePgOOtqnqe10=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Io7NRETv7li8kv2CaqgkE0SvYcrV9BAHk9wa+4I/BtX77uBU9JeVamgWhup4V6igE srZccw/DxikEZKXS0hswSTd7IvkagOuCnsielUG+3SB0eG5znY68DmKhLlF9uDZz6n 60ChwN2KG1qPr1n0jTSA2Gjmxa7mjr0X9DBlIoOFisv7A2HZmKrpiqWNvKmSJPcj6G pmf7l/5YE0dUMHdsBc+t/Gsy4m5tHKAiGUJwzYy4r+7hMj+BJTQRcrlwWJ7PKMPNos fje0+4ofCQfXgPKweWGPgzhYwEc0zcZRj9eRJHeAIr9TrdJIleZEGXzErRXhGENdS2 35XhYF8S2VLVA== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH 1/3] arm64: dts: mediatek: asurada: Add display regulators Date: Thu, 8 Sep 2022 13:11:51 -0400 Message-Id: <20220908171153.670762-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908171153.670762-1-nfraprado@collabora.com> References: <20220908171153.670762-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220908_101202_235626_FFB4D96F X-CRM114-Status: GOOD ( 11.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the regulators present on the Asurada platform that are used to power the internal and external displays. Signed-off-by: Nícolas F. R. A. Prado --- .../boot/dts/mediatek/mt8192-asurada.dtsi | 114 ++++++++++++++++++ 1 file changed, 114 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 4b314435f8fd..1d99e470ea1a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -23,6 +23,42 @@ memory@40000000 { reg = <0 0x40000000 0 0x80000000>; }; + pp1000_dpbrdg: regulator-1v0-dpbrdg { + compatible = "regulator-fixed"; + regulator-name = "pp1000_dpbrdg"; + pinctrl-names = "default"; + pinctrl-0 = <&pp1000_dpbrdg_en_pins>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + enable-active-high; + regulator-boot-on; + gpio = <&pio 19 GPIO_ACTIVE_HIGH>; + }; + + pp1000_mipibrdg: regulator-1v0-mipibrdg { + compatible = "regulator-fixed"; + regulator-name = "pp1000_mipibrdg"; + pinctrl-names = "default"; + pinctrl-0 = <&pp1000_mipibrdg_en_pins>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + enable-active-high; + regulator-boot-on; + gpio = <&pio 129 GPIO_ACTIVE_HIGH>; + }; + + pp1800_dpbrdg: regulator-1v8-dpbrdg { + compatible = "regulator-fixed"; + regulator-name = "pp1800_dpbrdg"; + pinctrl-names = "default"; + pinctrl-0 = <&pp1800_dpbrdg_en_pins>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + regulator-boot-on; + gpio = <&pio 126 GPIO_ACTIVE_HIGH>; + }; + /* system wide LDO 1.8V power rail */ pp1800_ldo_g: regulator-1v8-g { compatible = "regulator-fixed"; @@ -34,6 +70,30 @@ pp1800_ldo_g: regulator-1v8-g { vin-supply = <&pp3300_g>; }; + pp1800_mipibrdg: regulator-1v8-mipibrdg { + compatible = "regulator-fixed"; + regulator-name = "pp1800_mipibrdg"; + pinctrl-names = "default"; + pinctrl-0 = <&pp1800_mipibrdg_en_pins>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + regulator-boot-on; + gpio = <&pio 128 GPIO_ACTIVE_HIGH>; + }; + + pp3300_dpbrdg: regulator-3v3-dpbrdg { + compatible = "regulator-fixed"; + regulator-name = "pp3300_dpbrdg"; + pinctrl-names = "default"; + pinctrl-0 = <&pp3300_dpbrdg_en_pins>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + regulator-boot-on; + gpio = <&pio 26 GPIO_ACTIVE_HIGH>; + }; + /* system wide switching 3.3V power rail */ pp3300_g: regulator-3v3-g { compatible = "regulator-fixed"; @@ -56,6 +116,18 @@ pp3300_ldo_z: regulator-3v3-z { vin-supply = <&ppvar_sys>; }; + pp3300_mipibrdg: regulator-3v3-mipibrdg { + compatible = "regulator-fixed"; + regulator-name = "pp3300_mipibrdg"; + pinctrl-names = "default"; + pinctrl-0 = <&pp3300_mipibrdg_en_pins>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + regulator-boot-on; + gpio = <&pio 127 GPIO_ACTIVE_HIGH>; + }; + /* separately switched 3.3V power rail */ pp3300_u: regulator-3v3-u { compatible = "regulator-fixed"; @@ -719,6 +791,48 @@ pins-wifi-kill { }; }; + pp1000_dpbrdg_en_pins: pp1000-dpbrdg-en-pins { + pins-en { + pinmux = ; + output-low; + }; + }; + + pp1000_mipibrdg_en_pins: pp1000-mipibrdg-en-pins { + pins-en { + pinmux = ; + output-low; + }; + }; + + pp1800_dpbrdg_en_pins: pp1800-dpbrdg-en-pins { + pins-en { + pinmux = ; + output-low; + }; + }; + + pp1800_mipibrdg_en_pins: pp1800-mipibrd-en-pins { + pins-en { + pinmux = ; + output-low; + }; + }; + + pp3300_dpbrdg_en_pins: pp3300-dpbrdg-en-pins { + pins-en { + pinmux = ; + output-low; + }; + }; + + pp3300_mipibrdg_en_pins: pp3300-mipibrdg-en-pins { + pins-en { + pinmux = ; + output-low; + }; + }; + pp3300_wlan_pins: pp3300-wlan-pins { pins-pcie-en-pp3300-wlan { pinmux = ;