From patchwork Fri Sep 9 13:50:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 12971842 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92A56ECAAA1 for ; Fri, 9 Sep 2022 13:52:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=GpiEFrLetwWQCEYAd0pH8tXDyHfqOzRE6biDtD9W2pc=; b=gisVh82+iEtok4 qD1CKOLumgO6HkKyr50P2PU6mao7Ge1ZnpIKxweyhIiuNxuKGkZ1Cw960b5pHigAuAHMZ9wRAMxlZ NCBVb+43Uj8dMd+PszNr3XfI12mXAOLcj0xr7vDrk093tako565X03nay61Q3JGNemHrktnFeVzzM hP0dyif9pHYPNeVkRKtD2PKTlVYCcR8Yi23+tLakhS7lKRigYBa6Ff2JrVz2GBh+ByhLpo5ffWNp/ yhxaIVmVxpoBtSD5yHVOSnUuy3ZO5IYVCQGfskJstAFEtb4eCo7oQgWSOgu4MBDmE4QEzIeWEm1YZ smUueli/uKyh+dHeaFJw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWeQH-00GSWF-6F; Fri, 09 Sep 2022 13:51:57 +0000 Received: from soltyk.jannau.net ([144.76.91.90]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWePV-00GS9g-AZ for linux-arm-kernel@lists.infradead.org; Fri, 09 Sep 2022 13:51:12 +0000 Received: from robin.home.jannau.net (p54acc2ba.dip0.t-ipconnect.de [84.172.194.186]) by soltyk.jannau.net (Postfix) with ESMTPSA id ED01926EFEC; Fri, 9 Sep 2022 15:51:04 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Alyssa Rosenzweig , Hector Martin , Krzysztof Kozlowski , Marc Zyngier , Rob Herring , Sven Peter , Thomas Gleixner , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 03/10] dt-bindings: apple,aic2: Add CPU PMU per-cpu pseudo-interrupts Date: Fri, 9 Sep 2022 15:50:56 +0200 Message-Id: <20220909135103.98179-4-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909135103.98179-1-j@jannau.net> References: <20220909135103.98179-1-j@jannau.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220909_065109_561980_AD7D3630 X-CRM114-Status: GOOD ( 10.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Advertise the two pseudo-interrupts that tied to the two PMU flavours present in the Apple M1 Pro/Max/Ultra SoC. We choose the expose two different pseudo-interrupts to the OS as the e-core PMU is obviously different from the p-core one, effectively presenting two different devices. Imported from "apple,aic". Signed-off-by: Janne Grunau Acked-by: Krzysztof Kozlowski Acked-by: Marc Zyngier --- .../interrupt-controller/apple,aic2.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml index 47a78a167aba..06948c0e36a5 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -69,6 +69,35 @@ properties: power-domains: maxItems: 1 + affinities: + type: object + additionalProperties: false + description: + FIQ affinity can be expressed as a single "affinities" node, + containing a set of sub-nodes, one per FIQ with a non-default + affinity. + patternProperties: + "^.+-affinity$": + type: object + additionalProperties: false + properties: + apple,fiq-index: + description: + The interrupt number specified as a FIQ, and for which + the affinity is not the default. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 5 + + cpus: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should be a list of phandles to CPU nodes (as described in + Documentation/devicetree/bindings/arm/cpus.yaml). + + required: + - apple,fiq-index + - cpus + required: - compatible - '#interrupt-cells'