diff mbox series

[v2,6/8] ARM: dts: uniphier: Add ahci controller and glue layer nodes for PXs2

Message ID 20220912071511.1385-7-hayashi.kunihiko@socionext.com (mailing list archive)
State New, archived
Headers show
Series Update UniPhier armv7 devicetree | expand

Commit Message

Kunihiko Hayashi Sept. 12, 2022, 7:15 a.m. UTC 
Add ahci controller and glue layer nodes including reset and phy.
This supports for PXs2 and the boards without PXs2 vodka board that
doesn't implement any SATA connectors.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 arch/arm/boot/dts/uniphier-pxs2-gentil.dts |  4 +++
 arch/arm/boot/dts/uniphier-pxs2.dtsi       | 40 ++++++++++++++++++++++
 2 files changed, 44 insertions(+)

Comments

Arnd Bergmann Sept. 12, 2022, 8:36 a.m. UTC | #1 
On Mon, Sep 12, 2022, at 9:15 AM, Kunihiko Hayashi wrote:
> Add ahci controller and glue layer nodes including reset and phy.
> This supports for PXs2 and the boards without PXs2 vodka board that
> doesn't implement any SATA connectors.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> +		ahci: ahci@65600000 {
> +			compatible = "socionext,uniphier-pxs2-ahci",
> +				     "generic-ahci";
> +			status = "disabled";
> +			reg = <0x65600000 0x10000>;
> +			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&sys_clk 28>;
> +			resets = <&sys_rst 28>, <&ahci_rst 0>;
> +			ports-implemented = <1>;
> +			phys = <&ahci_phy>;
> +		};
> +
> +		ahci-glue@65700000 {
> +			compatible = "socionext,uniphier-pxs2-ahci-glue",
> +				     "simple-mfd";

Here as well, the "ahci-glue" name seems rather unusual for a node
name. What does it actually do, and why is this not just part of
the sata node?

> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0x65700000 0x100>;
> +
> +			ahci_rst: reset@0 {
> +				compatible = "socionext,uniphier-pxs2-ahci-reset";

I think the node name here should be "reset-controller@0".

> +
> +			ahci_phy: phy@10 {
> +				compatible = "socionext,uniphier-pxs2-ahci-phy";

and "sata-phy@10" here.

       Arnd
Kunihiko Hayashi Sept. 12, 2022, 12:10 p.m. UTC | #2 
Hi Arnd,

On 2022/09/12 17:36, Arnd Bergmann wrote:
> On Mon, Sep 12, 2022, at 9:15 AM, Kunihiko Hayashi wrote:
>> Add ahci controller and glue layer nodes including reset and phy.
>> This supports for PXs2 and the boards without PXs2 vodka board that
>> doesn't implement any SATA connectors.
>>
>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>> +		ahci: ahci@65600000 {
>> +			compatible = "socionext,uniphier-pxs2-ahci",
>> +				     "generic-ahci";
>> +			status = "disabled";
>> +			reg = <0x65600000 0x10000>;
>> +			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&sys_clk 28>;
>> +			resets = <&sys_rst 28>, <&ahci_rst 0>;
>> +			ports-implemented = <1>;
>> +			phys = <&ahci_phy>;
>> +		};
>> +
>> +		ahci-glue@65700000 {
>> +			compatible = "socionext,uniphier-pxs2-ahci-glue",
>> +				     "simple-mfd";
> 
> Here as well, the "ahci-glue" name seems rather unusual for a node
> name. What does it actually do, and why is this not just part of
> the sata node?

According to ata/sata-common.yaml, "ahci@65600000" node for generic SATA
host controller is better expressed as "sata@65600000". I'll fix it.

However, "ahci-glue@65700000" is the integration of SATA related functions
(reset and phy). Maybe "sata-controller" seems to be the best, but
I couldn't find this usage.

>> +			#address-cells = <1>;
>> +			#size-cells = <1>;
>> +			ranges = <0 0x65700000 0x100>;
>> +
>> +			ahci_rst: reset@0 {
>> +				compatible =
> "socionext,uniphier-pxs2-ahci-reset";
> 
> I think the node name here should be "reset-controller@0".

Yes, I'll fix it.

>> +
>> +			ahci_phy: phy@10 {
>> +				compatible =
> "socionext,uniphier-pxs2-ahci-phy";
> 
> and "sata-phy@10" here.

I'll fix it too.

Thank you,

---
Best Regards
Kunihiko Hayashi
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
index 759384b60663..5f18b926c50a 100644
--- a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
@@ -99,3 +99,7 @@  &usb0 {
 &usb1 {
 	status = "okay";
 };
+
+&ahci {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 7d8c437b8f8b..04e9467734c4 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -599,6 +599,46 @@  mdio: mdio {
 			};
 		};
 
+		ahci: ahci@65600000 {
+			compatible = "socionext,uniphier-pxs2-ahci",
+				     "generic-ahci";
+			status = "disabled";
+			reg = <0x65600000 0x10000>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sys_clk 28>;
+			resets = <&sys_rst 28>, <&ahci_rst 0>;
+			ports-implemented = <1>;
+			phys = <&ahci_phy>;
+		};
+
+		ahci-glue@65700000 {
+			compatible = "socionext,uniphier-pxs2-ahci-glue",
+				     "simple-mfd";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0x65700000 0x100>;
+
+			ahci_rst: reset@0 {
+				compatible = "socionext,uniphier-pxs2-ahci-reset";
+				reg = <0x0 0x4>;
+				clock-names = "link";
+				clocks = <&sys_clk 28>;
+				reset-names = "link";
+				resets = <&sys_rst 28>;
+				#reset-cells = <1>;
+			};
+
+			ahci_phy: phy@10 {
+				compatible = "socionext,uniphier-pxs2-ahci-phy";
+				reg = <0x10 0x10>;
+				clock-names = "link";
+				clocks = <&sys_clk 28>;
+				reset-names = "link", "phy";
+				resets = <&sys_rst 28>, <&sys_rst 30>;
+				#phy-cells = <0>;
+			};
+		};
+
 		usb0: usb@65a00000 {
 			compatible = "socionext,uniphier-dwc3", "snps,dwc3";
 			status = "disabled";