diff mbox series

[1/2] arm64: dts: ti: k3-am62: Add general purpose timers for am62

Message ID 20220914074224.44786-1-tony@atomide.com (mailing list archive)
State New, archived
Headers show
Series [1/2] arm64: dts: ti: k3-am62: Add general purpose timers for am62 | expand

Commit Message

Tony Lindgren Sept. 14, 2022, 7:42 a.m. UTC
There are 8 general purpose timers on am65 that can be used for things
like PWM using pwm-omap-dmtimer driver. There are also additional four
timers in the MCU domain that do not have interrupts routable for Linux.

We configure the timers with the 25 MHz input clock by default as the
32.768 kHz clock may not be wired on the device. We leave the MCU domain
timers clock mux unconfigured, and mark the MCU domain timers reserved.
The MCU domain timers are likely reserved by the software for the ESM
module.

Compared to am65, the timers on am62 do not have a dedicated IO mux for
the timers. On am62, the timers have different interrupts, clocks and
power domains compared to am65, and the MCU timers are at a different
IO address.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 97 ++++++++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi  | 45 +++++++++++
 2 files changed, 142 insertions(+)

Comments

Vignesh Raghavendra Sept. 17, 2022, 7:02 a.m. UTC | #1
On 14/09/22 1:12 pm, Tony Lindgren wrote:
> There are 8 general purpose timers on am65 that can be used for things
> like PWM using pwm-omap-dmtimer driver. There are also additional four
> timers in the MCU domain that do not have interrupts routable for Linux.
> 
> We configure the timers with the 25 MHz input clock by default as the
> 32.768 kHz clock may not be wired on the device. We leave the MCU domain
> timers clock mux unconfigured, and mark the MCU domain timers reserved.
> The MCU domain timers are likely reserved by the software for the ESM
> module.
> 
> Compared to am65, the timers on am62 do not have a dedicated IO mux for
> the timers. On am62, the timers have different interrupts, clocks and
> power domains compared to am65, and the MCU timers are at a different
> IO address.
> 
> Cc: Keerthy <j-keerthy@ti.com>
> Cc: Nishanth Menon <nm@ti.com>
> Cc: Vignesh Raghavendra <vigneshr@ti.com>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
>  arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 97 ++++++++++++++++++++++++
>  arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi  | 45 +++++++++++
>  2 files changed, 142 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -186,6 +186,103 @@ main_pmx0: pinctrl@f4000 {
>  		pinctrl-single,function-mask = <0xffffffff>;
>  	};
>  
> +	main_timer0: timer@2400000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x2400000 0x00 0x400>;
> +		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&k3_clks 36 2>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 36 2>;
> +		assigned-clock-parents = <&k3_clks 36 3>;
> +		power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;

I end up with

make dtbs_check

+/workdir/arch/arm64/boot/dts/ti/k3-am625-sk.dtb: timer@4800000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
+/workdir/arch/arm64/boot/dts/ti/k3-am625-sk.dtb: timer@4810000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
+/workdir/arch/arm64/boot/dts/ti/k3-am625-sk.dtb: timer@4820000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
+/workdir/arch/arm64/boot/dts/ti/k3-am625-sk.dtb: timer@4830000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'

Looks like schema does not describe power-domains :(

[...]

Regards
Vignesh
Tony Lindgren Sept. 19, 2022, 11:28 a.m. UTC | #2
* Vignesh Raghavendra <vigneshr@ti.com> [220917 06:54]:
> On 14/09/22 1:12 pm, Tony Lindgren wrote:
> > @@ -186,6 +186,103 @@ main_pmx0: pinctrl@f4000 {
> >  		pinctrl-single,function-mask = <0xffffffff>;
> >  	};
> >  
> > +	main_timer0: timer@2400000 {
> > +		compatible = "ti,am654-timer";
> > +		reg = <0x00 0x2400000 0x00 0x400>;
> > +		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> > +		clocks = <&k3_clks 36 2>;
> > +		clock-names = "fck";
> > +		assigned-clocks = <&k3_clks 36 2>;
> > +		assigned-clock-parents = <&k3_clks 36 3>;
> > +		power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
> 
> I end up with
> 
> make dtbs_check
> 
> +/workdir/arch/arm64/boot/dts/ti/k3-am625-sk.dtb: timer@4800000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
> +/workdir/arch/arm64/boot/dts/ti/k3-am625-sk.dtb: timer@4810000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
> +/workdir/arch/arm64/boot/dts/ti/k3-am625-sk.dtb: timer@4820000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
> +/workdir/arch/arm64/boot/dts/ti/k3-am625-sk.dtb: timer@4830000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
> 
> Looks like schema does not describe power-domains :(

Thanks for catching it, I've sent a patch for the binding for this at [0]
below.

Regards,

Tony

[0] https://lore.kernel.org/linux-devicetree/20220919112357.64997-1-tony@atomide.com/T/#u
Georgi Vlaev Oct. 28, 2022, 8:12 p.m. UTC | #3
Hi,

On 9/14/22 10:42, Tony Lindgren wrote:
> There are 8 general purpose timers on am65 that can be used for things
> like PWM using pwm-omap-dmtimer driver. There are also additional four
> timers in the MCU domain that do not have interrupts routable for Linux.
> 
> We configure the timers with the 25 MHz input clock by default as the
> 32.768 kHz clock may not be wired on the device. We leave the MCU domain
> timers clock mux unconfigured, and mark the MCU domain timers reserved.
> The MCU domain timers are likely reserved by the software for the ESM
> module.
> 
> Compared to am65, the timers on am62 do not have a dedicated IO mux for
> the timers. On am62, the timers have different interrupts, clocks and
> power domains compared to am65, and the MCU timers are at a different
> IO address.
> 
> Cc: Keerthy <j-keerthy@ti.com>
> Cc: Nishanth Menon <nm@ti.com>
> Cc: Vignesh Raghavendra <vigneshr@ti.com>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
>  arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 97 ++++++++++++++++++++++++
>  arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi  | 45 +++++++++++
>  2 files changed, 142 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -186,6 +186,103 @@ main_pmx0: pinctrl@f4000 {
>  		pinctrl-single,function-mask = <0xffffffff>;
>  	};
>  
> +	main_timer0: timer@2400000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x2400000 0x00 0x400>;
> +		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&k3_clks 36 2>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 36 2>;
> +		assigned-clock-parents = <&k3_clks 36 3>;
> +		power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +	};
> +
> +	main_timer1: timer@2410000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x2410000 0x00 0x400>;
> +		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&k3_clks 37 2>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 37 2>;
> +		assigned-clock-parents = <&k3_clks 37 3>;
> +		power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +	};
> +
> +	main_timer2: timer@2420000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x2420000 0x00 0x400>;
> +		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&k3_clks 38 2>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 38 2>;
> +		assigned-clock-parents = <&k3_clks 38 3>;
> +		power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +	};
> +
> +	main_timer3: timer@2430000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x2430000 0x00 0x400>;
> +		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&k3_clks 39 2>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 39 2>;
> +		assigned-clock-parents = <&k3_clks 39 3>;
> +		power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +	};
> +
> +	main_timer4: timer@2440000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x2440000 0x00 0x400>;
> +		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&k3_clks 40 2>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 40 2>;
> +		assigned-clock-parents = <&k3_clks 40 3>;
> +		power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +	};
> +
> +	main_timer5: timer@2450000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x2450000 0x00 0x400>;
> +		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&k3_clks 41 2>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 41 2>;
> +		assigned-clock-parents = <&k3_clks 41 3>;
> +		power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +	};
> +
> +	main_timer6: timer@2460000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x2460000 0x00 0x400>;
> +		interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&k3_clks 42 2>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 42 2>;
> +		assigned-clock-parents = <&k3_clks 42 3>;
> +		power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +	};
> +
> +	main_timer7: timer@2470000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x2470000 0x00 0x400>;
> +		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&k3_clks 43 2>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 43 2>;
> +		assigned-clock-parents = <&k3_clks 43 3>;
> +		power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +	};
> +
> +
>  	main_uart0: serial@2800000 {
>  		compatible = "ti,am64-uart", "ti,am654-uart";
>  		reg = <0x00 0x02800000 0x00 0x100>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> @@ -14,6 +14,51 @@ mcu_pmx0: pinctrl@4084000 {
>  		pinctrl-single,function-mask = <0xffffffff>;
>  	};
>  
> +	/*
> +	 * The MCU domain timer interrupts are routed only to the ESM module,
> +	 * and not currently available for Linux. The MCU domain timers are
> +	 * of limited use without interrupts, and likely reserved by the ESM.
> +	 */
> +	mcu_timer0: timer@4800000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x4800000 0x00 0x400>;
> +		clocks = <&k3_clks 35 2>;
> +		clock-names = "fck";
> +		power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +		status = "reserved";
> +	};
> +
> +	mcu_timer1: timer@4810000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x4810000 0x00 0x400>;
> +		clocks = <&k3_clks 48 2>;
> +		clock-names = "fck";
> +		power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +		status = "reserved";
> +	};
> +
> +	mcu_timer2: timer@4820000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x4820000 0x00 0x400>;
> +		clocks = <&k3_clks 49 2>;
> +		clock-names = "fck";
> +		power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +		status = "reserved";
> +	};
> +
> +	mcu_timer3: timer@4830000 {
> +		compatible = "ti,am654-timer";
> +		reg = <0x00 0x4830000 0x00 0x400>;
> +		clocks = <&k3_clks 50 2>;
> +		clock-names = "fck";
> +		power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
> +		ti,timer-pwm;
> +		status = "reserved";
> +	};
> +
>  	mcu_uart0: serial@4a00000 {
>  		compatible = "ti,am64-uart", "ti,am654-uart";
>  		reg = <0x00 0x04a00000 0x00 0x100>;

The "power-domains" property fix for the binding was merged recently.

Reviewed-by: Georgi Vlaev <g-vlaev@ti.com>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -186,6 +186,103 @@  main_pmx0: pinctrl@f4000 {
 		pinctrl-single,function-mask = <0xffffffff>;
 	};
 
+	main_timer0: timer@2400000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2400000 0x00 0x400>;
+		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 36 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 36 2>;
+		assigned-clock-parents = <&k3_clks 36 3>;
+		power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer1: timer@2410000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2410000 0x00 0x400>;
+		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 37 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 37 2>;
+		assigned-clock-parents = <&k3_clks 37 3>;
+		power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer2: timer@2420000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2420000 0x00 0x400>;
+		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 38 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 38 2>;
+		assigned-clock-parents = <&k3_clks 38 3>;
+		power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer3: timer@2430000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2430000 0x00 0x400>;
+		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 39 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 39 2>;
+		assigned-clock-parents = <&k3_clks 39 3>;
+		power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer4: timer@2440000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2440000 0x00 0x400>;
+		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 40 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 40 2>;
+		assigned-clock-parents = <&k3_clks 40 3>;
+		power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer5: timer@2450000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2450000 0x00 0x400>;
+		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 41 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 41 2>;
+		assigned-clock-parents = <&k3_clks 41 3>;
+		power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer6: timer@2460000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2460000 0x00 0x400>;
+		interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 42 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 42 2>;
+		assigned-clock-parents = <&k3_clks 42 3>;
+		power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer7: timer@2470000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2470000 0x00 0x400>;
+		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 43 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 43 2>;
+		assigned-clock-parents = <&k3_clks 43 3>;
+		power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+
 	main_uart0: serial@2800000 {
 		compatible = "ti,am64-uart", "ti,am654-uart";
 		reg = <0x00 0x02800000 0x00 0x100>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
--- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
@@ -14,6 +14,51 @@  mcu_pmx0: pinctrl@4084000 {
 		pinctrl-single,function-mask = <0xffffffff>;
 	};
 
+	/*
+	 * The MCU domain timer interrupts are routed only to the ESM module,
+	 * and not currently available for Linux. The MCU domain timers are
+	 * of limited use without interrupts, and likely reserved by the ESM.
+	 */
+	mcu_timer0: timer@4800000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x4800000 0x00 0x400>;
+		clocks = <&k3_clks 35 2>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+		status = "reserved";
+	};
+
+	mcu_timer1: timer@4810000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x4810000 0x00 0x400>;
+		clocks = <&k3_clks 48 2>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+		status = "reserved";
+	};
+
+	mcu_timer2: timer@4820000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x4820000 0x00 0x400>;
+		clocks = <&k3_clks 49 2>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+		status = "reserved";
+	};
+
+	mcu_timer3: timer@4830000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x4830000 0x00 0x400>;
+		clocks = <&k3_clks 50 2>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+		status = "reserved";
+	};
+
 	mcu_uart0: serial@4a00000 {
 		compatible = "ti,am64-uart", "ti,am654-uart";
 		reg = <0x00 0x04a00000 0x00 0x100>;