From patchwork Fri Sep 16 09:17:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 12978327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8467EC6FA8B for ; Fri, 16 Sep 2022 09:19:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=h+vNdGcfWb5YPZy6ElWXm2enZRPnvk1Ius8Obz1jSkg=; b=tXGVsK+8v4e0Fy 4gQai+KxFcQ4VuHml/J1xsJI9DfrkN3ROF4i/rGCmB5C19UfQdWhwUunG7Khz7ZGmy6eY5EXRuMUN KOEwZFVSn/gHEEfNduKBEMF1E6rYPy3TmbsRCKj52BOiQS5rr4ATnSAgFoe2LdikeldW18C7Eoxn3 I/X2G1GzZjvfC0EmIOOrEYfP/p804E553QngQqAK7Ze/q5H4k19x1Hp6jaCLh+tbt0aQFVQvPHuWq XpbVx0+G42U6mXfn9ocFH0MIeFa0iiCC/CA7uKleHisKjARkJXGNdJtHDdVYzbzWUpugtPGzarbIj GIDA/uEiJSav+Bhr2qcw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oZ7UM-00BcKx-9F; Fri, 16 Sep 2022 09:18:22 +0000 Received: from relay7-d.mail.gandi.net ([2001:4b98:dc4:8::227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oZ7UI-00BcFX-AL; Fri, 16 Sep 2022 09:18:20 +0000 Received: (Authenticated sender: foss@0leil.net) by mail.gandi.net (Postfix) with ESMTPSA id 8B6692000E; Fri, 16 Sep 2022 09:18:07 +0000 (UTC) From: Quentin Schulz To: Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linus.walleij@linaro.org, david@ixit.cz, jbx6244@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, foss+kernel@0leil.net, Quentin Schulz Subject: [PATCH] arm64: dts: rockchip: add i2s0 I2S/PDM/TDM 8ch controller to px30 Date: Fri, 16 Sep 2022 11:17:46 +0200 Message-Id: <20220916091746.35108-1-foss+kernel@0leil.net> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220916_021818_578387_A9EFA7E4 X-CRM114-Status: UNSURE ( 8.80 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Quentin Schulz The Rockchip PX30 SoC has three I2S controllers, i2s1 and i2s2 are 2-channel I2S/PCM controllers handled by the same controller driver, and i2s0 a 8-channel I2S/PCM/TDM controller handled by another controller driver. This adds the device tree node required to enable I2S0 on PX30. This was tested in a 2-channel I2S with TX BCLK/LRCK for both TX and RX (rockchip,trcm-sync-tx-only) setup on a soon-to-be-released board. Signed-off-by: Quentin Schulz --- arch/arm64/boot/dts/rockchip/px30.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 214f94fea3dc..bfa3580429d1 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -365,6 +365,28 @@ uart0: serial@ff030000 { status = "disabled"; }; + i2s0_8ch: i2s@ff060000 { + compatible = "rockchip,px30-i2s-tdm"; + reg = <0x0 0xff060000 0x0 0x1000>; + interrupts = ; + clocks = <&cru SCLK_I2S0_TX>, <&cru SCLK_I2S0_RX>, <&cru HCLK_I2S0>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + dmas = <&dmac 16>, <&dmac 17>; + dma-names = "tx", "rx"; + rockchip,grf = <&grf>; + resets = <&cru SRST_I2S0_TX>, <&cru SRST_I2S0_RX>; + reset-names = "tx-m", "rx-m"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8ch_sclkrx + &i2s0_8ch_lrcktx &i2s0_8ch_lrckrx + &i2s0_8ch_sdo0 &i2s0_8ch_sdi0 + &i2s0_8ch_sdo1 &i2s0_8ch_sdi1 + &i2s0_8ch_sdo2 &i2s0_8ch_sdi2 + &i2s0_8ch_sdo3 &i2s0_8ch_sdi3>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + i2s1_2ch: i2s@ff070000 { compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s"; reg = <0x0 0xff070000 0x0 0x1000>;