diff mbox series

[RFC,20/38] arm64/sysreg: Convert ID_MMFR3_EL1 to automatic generation

Message ID 20220930140211.3215348-21-james.morse@arm.com (mailing list archive)
State New, archived
Headers show
Series arm64/sysreg: Convert aarch32 id regs | expand

Commit Message

James Morse Sept. 30, 2022, 2:01 p.m. UTC 
Convert ID_MMFR3_EL1 to be automatically generated as per DDI04187H.a,
no functional changes.

Signed-off-by: James Morse <james.morse@arm.com>
---
 arch/arm64/include/asm/sysreg.h |  1 -
 arch/arm64/tools/sysreg         | 40 +++++++++++++++++++++++++++++++++
 2 files changed, 40 insertions(+), 1 deletion(-)

Comments

Mark Brown Oct. 3, 2022, 3:46 p.m. UTC | #1 
On Fri, Sep 30, 2022 at 03:01:53PM +0100, James Morse wrote:
> Convert ID_MMFR3_EL1 to be automatically generated as per DDI04187H.a,
> no functional changes.

Reviewed-by: Mark Brown <broonie@kernel.org>

> +Res0	63:32
> +Enum	31:28	SuperSec
> +	0b0000	IMP
> +	0b1111	NI
> +EndEnum

DDI0487I.a has this as just plain Supersec.  I don't know that it makes
a difference.
diff mbox series

Patch

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index e517cf0e6e1e..b4ea9e00b833 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -171,7 +171,6 @@ 
 #define SYS_ID_DFR0_EL1			sys_reg(3, 0, 0, 1, 2)
 #define SYS_ID_DFR1_EL1			sys_reg(3, 0, 0, 3, 5)
 #define SYS_ID_AFR0_EL1			sys_reg(3, 0, 0, 1, 3)
-#define SYS_ID_MMFR3_EL1		sys_reg(3, 0, 0, 1, 7)
 #define SYS_ID_MMFR4_EL1		sys_reg(3, 0, 0, 2, 6)
 #define SYS_ID_MMFR5_EL1		sys_reg(3, 0, 0, 3, 6)
 
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index b4b8073cc05a..1c762ef43568 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -183,6 +183,46 @@  Enum	3:0	L1HvdFG
 EndEnum
 EndSysreg
 
+Sysreg ID_MMFR3_EL1	3	0	0	1	7
+Res0	63:32
+Enum	31:28	SuperSec
+	0b0000	IMP
+	0b1111	NI
+EndEnum
+Enum	27:24	CMemSz
+	0b0000	4GB
+	0b0001	64GB
+	0b0010	1TB
+EndEnum
+Enum	23:20	CohWalk
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	19:16	PAN
+	0b0000	NI
+	0b0001	PAN
+	0b0010	PAN2
+EndEnum
+Enum	15:12	MaintBcst
+	0b0000	NI
+	0b0001	NO_TLB
+	0b0010	ALL
+EndEnum
+Enum	11:8	BPMaint
+	0b0000	NI
+	0b0001	ALL
+	0b0010	BY_VA
+EndEnum
+Enum	7:4	CMaintSW
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	3:0	CMaintVA
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+EndSysreg
+
 Sysreg	ID_AA64PFR0_EL1	3	0	0	4	0
 Enum	63:60	CSV3
 	0b0000	NI