From patchwork Fri Oct 7 15:16:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13001196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82BEEC43217 for ; Fri, 7 Oct 2022 15:17:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vfLwl4eguvHWhtOlujOVcb0t/t6xCgzggilyOAkkYPU=; b=K4m0SzvpBdnbWe jkDn64Hme8/+L4VNigtJEeV39ezMasVYuURL7IsouMyV8151ElEKxc5T1TVV7reOZAgTJJsXAeVHb qekfFNjSAoZ6kXhDI2DX5fH9ACDmvg/jW679Zjd4Bj3OGq+eLQwHi3lAzel/7sIdgsLAai/TYlgYy BeOE6gc68nGErQksqEAWEE4+kvG+tIvGu8a8u/Z+QCaIij08gla+F8mfHPIjmN4tyWaBziZ3EKk05 yYXyfWMWrcNbuJdw/d6GjmrtQ8pqTV/YsuhMS+UzymOsKS+LGpo+P3s7HF2slp43ehUL7xN6ouaP+ sGu3BFpA/rm6Mrhgz61A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ogp5b-009Qqs-4m; Fri, 07 Oct 2022 15:16:39 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ogp5R-009Qo7-0J for linux-arm-kernel@lists.infradead.org; Fri, 07 Oct 2022 15:16:30 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1665155788; x=1696691788; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MftuM8BEvNJXATFrd61V1+1XsawZc1H6WdLWix2XKxk=; b=0BQWUm3BFiZQRUH4X4zH/m5SpGQWj/+5r59tPbnOMk2GCe8GnI0acKhw 1qwe5RahQildu2Ya+1PkPMJBYZb4SNecy2PqimvlcMq0ova0xko/5ODZi lTTopmtA1Gm4HydrxAy0oAB5ueJGgsRkr4PyBHzExLTP1M/OsQ+P9cHso SXqqnhj3orQp8t7iA43MmCbAJonqRN42zVpAevpdD+mn2b/sTuiIlj+nj PILUbFBQL9t0jnom9/7TyfLXh7UFGxBo0bfnfurXpoju7C0JGFpPHlTSB VYXwsUQgoTHt1tUr3LnSxZbVIYXOIWg1sSQVSzmGWSbZ+NOvrzMpcpLuY A==; X-IronPort-AV: E=Sophos;i="5.95,167,1661842800"; d="scan'208";a="194275889" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Oct 2022 08:16:23 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 7 Oct 2022 08:16:23 -0700 Received: from ryan-Precision-5560.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 7 Oct 2022 08:16:23 -0700 From: To: , , , , CC: , , , Ryan Wanner Subject: [PATCH 1/2] pinctrl: at91-pio4: Add configuration to userspace Date: Fri, 7 Oct 2022 08:16:46 -0700 Message-ID: <20221007151647.98222-2-Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221007151647.98222-1-Ryan.Wanner@microchip.com> References: <20221007151647.98222-1-Ryan.Wanner@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221007_081629_072512_03E2D2A0 X-CRM114-Status: GOOD ( 12.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Adding support for line bias flags that have been implented in gpio API. There are functions in the gpiod library that can control line bias from userspace this adds that functionality to this driver. Adding .pin_config_set allows the driver's pin configuration to be accessed from userspace. The general idea for this as been taken from stm32, intel, and rockchip drivers that have userspace access for bias flags. Signed-off-by: Ryan Wanner Tested-by: Nicolas Ferre # on sama5d27 som1 ek Acked-by: Nicolas Ferre --- drivers/pinctrl/pinctrl-at91-pio4.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index 517f2a6330ad..13b77f1eb6e2 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -902,6 +902,25 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev, return 0; } +static int atmel_conf_pin_config_set(struct pinctrl_dev *pctldev, + unsigned pin, + unsigned long *configs, + unsigned num_configs) +{ + struct atmel_group *grp = atmel_pctl_find_group_by_pin(pctldev, pin); + + return atmel_conf_pin_config_group_set(pctldev, grp->pin, configs, num_configs); +} + +static int atmel_conf_pin_config_get(struct pinctrl_dev *pctldev, + unsigned pin, + unsigned long *configs) +{ + struct atmel_group *grp = atmel_pctl_find_group_by_pin(pctldev, pin); + + return atmel_conf_pin_config_group_get(pctldev, grp->pin, configs); +} + static void atmel_conf_pin_config_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned int pin_id) @@ -949,6 +968,8 @@ static const struct pinconf_ops atmel_confops = { .pin_config_group_get = atmel_conf_pin_config_group_get, .pin_config_group_set = atmel_conf_pin_config_group_set, .pin_config_dbg_show = atmel_conf_pin_config_dbg_show, + .pin_config_set = atmel_conf_pin_config_set, + .pin_config_get = atmel_conf_pin_config_get, }; static struct pinctrl_desc atmel_pinctrl_desc = { @@ -1139,6 +1160,7 @@ static int atmel_pinctrl_probe(struct platform_device *pdev) atmel_pioctrl->gpio_chip->label = dev_name(dev); atmel_pioctrl->gpio_chip->parent = dev; atmel_pioctrl->gpio_chip->names = atmel_pioctrl->group_names; + atmel_pioctrl->gpio_chip->set_config = gpiochip_generic_config; atmel_pioctrl->pm_wakeup_sources = devm_kcalloc(dev, atmel_pioctrl->nbanks,