diff mbox series

[v3,06/15] media: v4l2: Add v4l2 control IDs for VP9 encoder.

Message ID 20221011122516.32135-7-aakarsh.jain@samsung.com (mailing list archive)
State New, archived
Headers show
Series [v3,01/15] dt-bindings: media: s5p-mfc: Add new DT schema for MFC | expand

Commit Message

Aakarsh Jain Oct. 11, 2022, 12:25 p.m. UTC
From: Smitha T Murthy <smitha.t@samsung.com>

Add V4l2 controls for VP9 encoder

Cc: linux-fsd@tesla.com
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Signed-off-by: Aakarsh Jain <aakarsh.jain@samsung.com>
---
 drivers/media/v4l2-core/v4l2-ctrls-defs.c | 44 +++++++++++++++++++++++
 include/uapi/linux/v4l2-controls.h        | 33 +++++++++++++++++
 2 files changed, 77 insertions(+)
diff mbox series

Patch

diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c
index e22921e7ea61..2d92e93158bd 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c
@@ -577,6 +577,21 @@  const char * const *v4l2_ctrl_get_menu(u32 id)
 		"Cyclic",
 		NULL,
 	};
+	static const char * const vp9_golden_framesel[] = {
+		"Use previous",
+		"Use refresh period",
+		NULL,
+	};
+	static const char * const vp9_ref_num_for_pframes[] = {
+		"1",
+		"2",
+		NULL,
+	};
+	static const char * const vp9_max_partition_depth[] = {
+	"No CU partition depth",
+	"Allow 1 CU partition depth",
+	NULL,
+	};
 
 	switch (id) {
 	case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
@@ -708,6 +723,12 @@  const char * const *v4l2_ctrl_get_menu(u32 id)
 		return hevc_decode_mode;
 	case V4L2_CID_STATELESS_HEVC_START_CODE:
 		return hevc_start_code;
+	case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL:
+		return vp9_golden_framesel;
+	case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES:
+		return vp9_ref_num_for_pframes;
+	case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH:
+		return vp9_max_partition_depth;
 	case V4L2_CID_CAMERA_ORIENTATION:
 		return camera_orientation;
 	case V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE:
@@ -950,6 +971,26 @@  const char *v4l2_ctrl_get_name(u32 id)
 	case V4L2_CID_MPEG_VIDEO_VP8_PROFILE:			return "VP8 Profile";
 	case V4L2_CID_MPEG_VIDEO_VP9_PROFILE:			return "VP9 Profile";
 	case V4L2_CID_MPEG_VIDEO_VP9_LEVEL:			return "VP9 Level";
+	case V4L2_CID_CODEC_VP9_I_FRAME_QP:		return "VP9 I Frame QP Value";
+	case V4L2_CID_CODEC_VP9_P_FRAME_QP:		return "VP9 P Frame QP Value";
+	case V4L2_CID_CODEC_VP9_MAX_QP:			return "VP9 Frame QP MAX Value";
+	case V4L2_CID_CODEC_VP9_MIN_QP:			return "VP9 Frame QP MIN Value";
+	case V4L2_CID_CODEC_VP9_RC_FRAME_RATE:		return "VP9 Frame Rate";
+	case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL:	return "VP9 Indication of Golden Frame";
+	case V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD:	return "VP9 Golden Frame Refresh Period";
+	case V4L2_CID_CODEC_VP9_HIERARCHY_QP_ENABLE:	return "VP9 Hierarchical QP Enable";
+	case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES:	return "VP9 Number of Reference Pictures";
+	case V4L2_CID_CODEC_VP9_HIERARCHICAL_CODING_LAYER:return "VP9 Num of Hierarchical Layers";
+	case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH:	return "VP9 Maximum Coding Unit Depth";
+	case V4L2_CID_CODEC_VP9_DISABLE_INTRA_PU_SPLIT:	return "VP9 Disable Intra PU Split";
+	case V4L2_CID_CODEC_VP9_HIERARCHY_RC_ENABLE:	return "VP9 Hierarchical BitRate Enable";
+	case V4L2_CID_CODEC_VP9_HIER_CODING_L0_BR:	return "VP9 Hierarchical Layer 0 BitRate";
+	case V4L2_CID_CODEC_VP9_HIER_CODING_L1_BR:	return "VP9 Hierarchical Layer 1 BitRate";
+	case V4L2_CID_CODEC_VP9_HIER_CODING_L2_BR:	return "VP9 Hierarchical Layer 2 BitRate";
+	case V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP:	return "VP9 Layer0 QP Value";
+	case V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP:	return "VP9 Layer1 QP Value";
+	case V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP:	return "VP9 Layer2 QP Value";
+	case V4L2_CID_CODEC_VP9_DISABLE_IVF_HEADER:	return "VP9 IVF header generation";
 
 	/* HEVC controls */
 	case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:		return "HEVC I-Frame QP Value";
@@ -1366,6 +1407,9 @@  void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
 	case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE:
 	case V4L2_CID_STATELESS_HEVC_DECODE_MODE:
 	case V4L2_CID_STATELESS_HEVC_START_CODE:
+	case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL:
+	case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES:
+	case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH:
 	case V4L2_CID_STATELESS_H264_DECODE_MODE:
 	case V4L2_CID_STATELESS_H264_START_CODE:
 	case V4L2_CID_CAMERA_ORIENTATION:
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index b5e7d082b8ad..a60b60bc4ad4 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -722,6 +722,38 @@  enum v4l2_mpeg_video_vp9_level {
 	V4L2_MPEG_VIDEO_VP9_LEVEL_6_1	= 12,
 	V4L2_MPEG_VIDEO_VP9_LEVEL_6_2	= 13,
 };
+#define V4L2_CID_CODEC_VP9_RC_FRAME_RATE	(V4L2_CID_CODEC_BASE+514)
+#define V4L2_CID_CODEC_VP9_MIN_QP		(V4L2_CID_CODEC_BASE+515)
+#define V4L2_CID_CODEC_VP9_MAX_QP		(V4L2_CID_CODEC_BASE+516)
+#define V4L2_CID_CODEC_VP9_I_FRAME_QP	(V4L2_CID_CODEC_BASE+517)
+#define V4L2_CID_CODEC_VP9_P_FRAME_QP	(V4L2_CID_CODEC_BASE+518)
+#define V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL	(V4L2_CID_CODEC_BASE+519)
+enum v4l2_mpeg_vp9_golden_framesel {
+	V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_PREV           = 0,
+	V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_REF_PERIOD     = 1,
+};
+#define V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+520)
+#define V4L2_CID_CODEC_VP9_HIERARCHY_QP_ENABLE (V4L2_CID_CODEC_BASE+521)
+#define V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES (V4L2_CID_CODEC_BASE+522)
+enum v4l2_mpeg_vp9_ref_num_for_pframes {
+	V4L2_CID_CODEC_VP9_1_REF_PFRAME     = 0,
+	V4L2_CID_CODEC_VP9_2_REF_PFRAME     = 1,
+};
+#define V4L2_CID_CODEC_VP9_HIERARCHICAL_CODING_LAYER (V4L2_CID_CODEC_BASE+523)
+#define V4L2_CID_CODEC_VP9_HIER_CODING_L0_BR	(V4L2_CID_CODEC_BASE+524)
+#define V4L2_CID_CODEC_VP9_HIER_CODING_L1_BR	(V4L2_CID_CODEC_BASE+525)
+#define V4L2_CID_CODEC_VP9_HIER_CODING_L2_BR	(V4L2_CID_CODEC_BASE+526)
+#define V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP	(V4L2_CID_CODEC_BASE+527)
+#define V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP	(V4L2_CID_CODEC_BASE+528)
+#define V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP	(V4L2_CID_CODEC_BASE+529)
+#define V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH	(V4L2_CID_CODEC_BASE+530)
+enum v4l2_mpeg_vp9_num_partitions {
+	V4L2_CID_CODEC_VP9_0_PARTITION     = 0,
+	V4L2_CID_CODEC_VP9_1_PARTITION	= 1,
+};
+#define V4L2_CID_CODEC_VP9_DISABLE_INTRA_PU_SPLIT	(V4L2_CID_CODEC_BASE+531)
+#define V4L2_CID_CODEC_VP9_DISABLE_IVF_HEADER	(V4L2_CID_CODEC_BASE+532)
+#define V4L2_CID_CODEC_VP9_HIERARCHY_RC_ENABLE	(V4L2_CID_CODEC_BASE+533)
 
 /* CIDs for HEVC encoding. */
 
@@ -832,6 +864,7 @@  enum v4l2_mpeg_video_frame_skip_mode {
 #define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY		(V4L2_CID_CODEC_BASE + 653)
 #define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE	(V4L2_CID_CODEC_BASE + 654)
 
+
 /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
 #define V4L2_CID_CODEC_CX2341X_BASE				(V4L2_CTRL_CLASS_CODEC | 0x1000)
 #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE		(V4L2_CID_CODEC_CX2341X_BASE+0)