From patchwork Thu Oct 20 16:03:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 13013709 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 387BEC4332F for ; Thu, 20 Oct 2022 16:05:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2+LjG1nXZ9Uyzsyo79iOfV4ewSRWLkiF0T4ReslAiaY=; b=0qJLv+f8GS4Xd4 /Y6vWpN7Ytci67zha8O7jHT3U65TAhgVjaHt6QsOlnhroxRQtFhyDkdDtm37sDHWMF+fuIGYHByff 4tcC0bGy2G8JDYFZYwVTr68v2Pqx1aDqjI+swPav300NlgpEPfhrwhaTIX8H5J4ltvFyK2rdGRjHq fv8aNIMc9JoNNwvDW2IuWkAGveix0twmaXhlKUqrI+m8dvpdHXoC1KUcxs+RaYKvnQjlrTGqyKJvt UeTn4XtwifK1J1CC0tjcXXe1DFKki63rd0GjEo0D/qaqt9LwFcty54Xlufg/9CNW9jCrKB91MCyu8 rrsLckm/0p9Ok+LBY6hA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1olY1a-0007eG-Ik; Thu, 20 Oct 2022 16:04:02 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1olY0w-0007RN-Qa for linux-arm-kernel@lists.infradead.org; Thu, 20 Oct 2022 16:03:27 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29KG3DbZ005217; Thu, 20 Oct 2022 11:03:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666281793; bh=U+hC7ByBwFE4JjAug0CbHq7f6BlLapgHTsla8sqywTk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=DQyutvi7i1DDB13Bv/nhfRB/AqzyaKH48riSIeoiMlQng1l9uZ7R5vj3oYtmMhllS KmSpEhNKC/+fHtOq6FDuMdTMetUMjZVS8o6R2XDhQKRO7ogrrpUzhdA6qe+Tn+Ch14 59uXF+nhWG1pLmAHvEeJYCRwghI/1gvFrQouJ51Q= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29KG3Dib013933 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 20 Oct 2022 11:03:13 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 20 Oct 2022 11:03:12 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:12 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363H059665; Thu, 20 Oct 2022 11:03:12 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 09/12] arm64: dts: ti: k3-j7200: Enable Mailbox nodes at the board level Date: Thu, 20 Oct 2022 11:03:02 -0500 Message-ID: <20221020160305.18711-10-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221020_090323_105177_4847DCCC X-CRM114-Status: GOOD ( 11.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Mailbox nodes defined in the top-level J7200 SoC dtsi files are incomplete and may not be functional unless they are extended with a chosen interrupt and connection to a remote processor. As the remote processors depend on memory nodes which are only known at the board integration level, these nodes should only be enabled when provided with the above information. Disable the Mailbox nodes in the dtsi files and only enable the ones that are actually used on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 12 ++++++ arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 42 +-------------------- 2 files changed, 14 insertions(+), 40 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 610d042ffa1d6..138381f43ce40 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -142,6 +142,7 @@ mailbox0_cluster0: mailbox@31f80000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster1: mailbox@31f81000 { @@ -151,6 +152,7 @@ mailbox0_cluster1: mailbox@31f81000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster2: mailbox@31f82000 { @@ -160,6 +162,7 @@ mailbox0_cluster2: mailbox@31f82000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster3: mailbox@31f83000 { @@ -169,6 +172,7 @@ mailbox0_cluster3: mailbox@31f83000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster4: mailbox@31f84000 { @@ -178,6 +182,7 @@ mailbox0_cluster4: mailbox@31f84000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster5: mailbox@31f85000 { @@ -187,6 +192,7 @@ mailbox0_cluster5: mailbox@31f85000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster6: mailbox@31f86000 { @@ -196,6 +202,7 @@ mailbox0_cluster6: mailbox@31f86000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster7: mailbox@31f87000 { @@ -205,6 +212,7 @@ mailbox0_cluster7: mailbox@31f87000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster8: mailbox@31f88000 { @@ -214,6 +222,7 @@ mailbox0_cluster8: mailbox@31f88000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster9: mailbox@31f89000 { @@ -223,6 +232,7 @@ mailbox0_cluster9: mailbox@31f89000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster10: mailbox@31f8a000 { @@ -232,6 +242,7 @@ mailbox0_cluster10: mailbox@31f8a000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster11: mailbox@31f8b000 { @@ -241,6 +252,7 @@ mailbox0_cluster11: mailbox@31f8b000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; main_ringacc: ringacc@3c000000 { diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index 2d615c3e9fa10..fa44ed4c17d50 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -144,6 +144,7 @@ flash@0,0 { }; &mailbox0_cluster0 { + status = "okay"; interrupts = <436>; mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { @@ -158,6 +159,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { }; &mailbox0_cluster1 { + status = "okay"; interrupts = <432>; mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { @@ -171,46 +173,6 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { }; }; -&mailbox0_cluster2 { - status = "disabled"; -}; - -&mailbox0_cluster3 { - status = "disabled"; -}; - -&mailbox0_cluster4 { - status = "disabled"; -}; - -&mailbox0_cluster5 { - status = "disabled"; -}; - -&mailbox0_cluster6 { - status = "disabled"; -}; - -&mailbox0_cluster7 { - status = "disabled"; -}; - -&mailbox0_cluster8 { - status = "disabled"; -}; - -&mailbox0_cluster9 { - status = "disabled"; -}; - -&mailbox0_cluster10 { - status = "disabled"; -}; - -&mailbox0_cluster11 { - status = "disabled"; -}; - &mcu_r5fss0_core0 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>,