| Message ID | 20221025081909.404107-3-mranostay@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | dt-bindings: PCI: ti,j721e-pci-*: resolve unexpected property warnings | expand |
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index aed437dac363..10e6eabdff53 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -58,6 +58,13 @@ properties: dma-coherent: description: Indicates that the PCIe IP block can ensure the coherency + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: link_state + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 0f5914a22c14..d9df7cd922f1 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -76,6 +76,13 @@ properties: msi-map: true + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: link_state + interrupt-controller: type: object additionalProperties: false
Both interrupts, and interrupt names weren't defined in both EP and host yaml. Also define the only possible interrupt-name as link_state, and maxItems of interrupts to one. This patch resolves the following warning: arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dtb: pcie-ep@2910000: Unevaluated properties are not allowed ('interrupt-names', 'interrupts' were unexpected) From schema Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Matt Ranostay <mranostay@ti.com> --- Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 7 +++++++ .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 7 +++++++ 2 files changed, 14 insertions(+)