From patchwork Wed Oct 26 19:42:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 13021201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE1ECC38A2D for ; Wed, 26 Oct 2022 19:44:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lrkOSn6yQbXdaCJsOlaORBXBFu2x24tk2masDaeXUts=; b=iSOAVpITvBxDqG Gf1afBXf4+jiwSObD5LZzIFrwOgBagSM6dXPaNpRcnX6aGWm2I7Q8SgQ1W3pXvj4azTCzlW3P0H2R mOvps1dVAfs0DI7YQDROoJmT6wav4PZdPGElJg+KXZT9sOgYCHTkh6e7Y3Qkc+zGYKn7HjnaWhqkX RvFR7aI1i58Ga61HxGyZTb4OVLCv+neRpR4CwEfSZ54y5aMqxIVF2sDAdFDIrsBNnSFToheuF9wCn 6ZcDB2IAHmzWA4oL873/IhtOz0TaMODYPqWDchulo0REh2x2Hi0ROFQQyzo7J8SvXXfy5BKcQKfYx X5vCGMKXpQ+nF6AzKQhA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1onmJH-00Aoz3-Ip; Wed, 26 Oct 2022 19:43:31 +0000 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1onmIN-00AogC-8G for linux-arm-kernel@lists.infradead.org; Wed, 26 Oct 2022 19:42:37 +0000 Received: by mail-pg1-x532.google.com with SMTP id 78so15911305pgb.13 for ; Wed, 26 Oct 2022 12:42:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LFkN1+K+3c6IFRt45FwrvvUQl9YtYqgay0mkP7wZUzI=; b=Ptd/qvcQFlVNozF95zAXwMzpsas/LwI5wHV3oflUnbitKOiLaHryheLfF3YTU7W17v DouX+oik7tskpRZKEOv/6c+nv6ly+84fq1yReybvquZ46D9b16eI1rp5TR8B0iTslP9D aJcizkMujXHwIpHkD76cUTfDfKViObgVbX9cY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LFkN1+K+3c6IFRt45FwrvvUQl9YtYqgay0mkP7wZUzI=; b=2QBc5qbzsBQKcMDnbX6HVjFSFF5s+XHzu7kLJKZG+fxUlehEggJBa46stfh9vH+ElM uNrx+Gt842CCRQo6jol5FfvIng8l77mlAXKcUYvaEo+mbhXsUjvHRF5KDNuseJqS28e7 zgDhJ7ISSgZrXKPhUJk2nJr88NypBooT+r4Pd0lVtnzg5rkck+IbGDKARw5dRIbGsj23 W26FXAysKDf3Mk1iYd+E39N+AnW28dMxoZPWXFBmHVVzNVcrJfhn1HpUA+pcxttGQRlX W+cfAN7yi19ZD5ogstY5vupaG8P4sOjd8M/n930EOK9891De0d1FF2gpPHaq6VbHrBEp /Fzg== X-Gm-Message-State: ACrzQf1N78qMKAW9/29HePfFl7Qq4I8SfMy4q0JJ97NFXUOcoyk5xG2C V55i8NmNH73SM+SfyvF7h9TP7w== X-Google-Smtp-Source: AMsMyM7MUq83w6QW8GTgoSVmGHUkhYg+59TKZGFbk++5ozcHLFc830Dpn94qePcFscvuSJH84VxKfw== X-Received: by 2002:a63:4461:0:b0:43c:dbdb:90c4 with SMTP id t33-20020a634461000000b0043cdbdb90c4mr37440184pgk.340.1666813351660; Wed, 26 Oct 2022 12:42:31 -0700 (PDT) Received: from localhost ([2620:15c:9d:2:c9e3:74f3:6b2b:135]) by smtp.gmail.com with UTF8SMTPSA id y20-20020a170902b49400b00179e1f08634sm3219719plr.222.2022.10.26.12.42.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Oct 2022 12:42:31 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Guo , linux-mmc@vger.kernel.org, Adrian Hunter , Shawn Lin , Michal Simek , Sascha Hauer , Bjorn Andersson , Thierry Reding , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Broadcom internal kernel review list , Jonathan Hunter , Andy Gross , Pengutronix Kernel Team , linux-kernel@vger.kernel.org, Konrad Dybcio , Al Cooper , Fabio Estevam , Florian Fainelli , NXP Linux Team , Haibo Chen , Sowjanya Komatineni , Brian Norris , stable@vger.kernel.org, Guenter Roeck Subject: [PATCH v4 2/7] mmc: sdhci-of-arasan: Fix SDHCI_RESET_ALL for CQHCI Date: Wed, 26 Oct 2022 12:42:04 -0700 Message-Id: <20221026124150.v4.2.I29f6a2189e84e35ad89c1833793dca9e36c64297@changeid> X-Mailer: git-send-email 2.38.0.135.g90850a2211-goog In-Reply-To: <20221026194209.3758834-1-briannorris@chromium.org> References: <20221026194209.3758834-1-briannorris@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221026_124235_365202_B008A254 X-CRM114-Status: GOOD ( 18.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but one particular case I hit commonly enough: mmc_suspend() -> mmc_power_off(). Typically we will eventually deactivate CQE (cqhci_suspend() -> cqhci_deactivate()), but that's not guaranteed -- in particular, if we perform a partial (e.g., interrupted) system suspend. The same bug was already found and fixed for two other drivers, in v5.7 and v5.9: 5cf583f1fb9c ("mmc: sdhci-msm: Deactivate CQE during SDHC reset") df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers") The latter is especially prescient, saying "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." So like these other patches, deactivate CQHCI when resetting the controller. Do this via the new sdhci_and_cqhci_reset() helper. This patch depends on (and should not compile without) the patch entitled "mmc: cqhci: Provide helper for resetting both SDHCI and CQHCI". Fixes: 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1") Cc: Signed-off-by: Brian Norris Reviewed-by: Guenter Roeck Acked-by: Adrian Hunter --- Changes in v4: - Improve for-stable cherry-picking notes - Add Adrian's Ack Changes in v3: - Refactor to a "SDHCI and CQHCI" helper -- sdhci_and_cqhci_reset() Changes in v2: - Rely on cqhci_deactivate() to safely handle (ignore) not-yet-initialized CQE support drivers/mmc/host/sdhci-of-arasan.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 3997cad1f793..cfb891430174 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -25,6 +25,7 @@ #include #include "cqhci.h" +#include "sdhci-cqhci.h" #include "sdhci-pltfm.h" #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 @@ -366,7 +367,7 @@ static void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); - sdhci_reset(host, mask); + sdhci_and_cqhci_reset(host, mask); if (sdhci_arasan->quirks & SDHCI_ARASAN_QUIRK_FORCE_CDTEST) { ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);