Message ID | 20221028165426.1707896-13-james.morse@arm.com (mailing list archive) |
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State | New, archived |
Headers | show
Return-Path: <linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0C1E5C38A02 for <linux-arm-kernel@archiver.kernel.org>; Fri, 28 Oct 2022 17:08:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Geg7dDfwTGk2LNuWmXU8cIMVlI9DF8EYT9o13CrSugw=; b=aAK2kKNlPKX8u/ jdes0kNprOYUwYM7TwH+EJKIymA88R4cJynEv5fRPWbFeFbKWBw3x+w+SBuG/7d6YIYt0fy+WrozZ 1D2sz8RC81eEpqoFjq156SdH0FV8DWx4rdIVa9WRew4nR0zgIAv1L3blda+/qX4L/rfcJolih3Vco AfeVPn2X1uPgAn01zRGu5QG6DYo1bqyngLNZyXni3zBuix/OOXAjjF8VKjJ93gsUvJk5/bgIFn6k7 VIe1akOyzoUkeu+tDMFvlcoTlWUjPfdl5q+Rz1/7mW4KBZCVYLBQgt0A46tJyV72/ujqRUeUdZF1/ ob8iHz0bXpmY2R1wDV9A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ooSpN-0019CY-Oz; Fri, 28 Oct 2022 17:07:30 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ooSdS-0014AF-Je for linux-arm-kernel@lists.infradead.org; Fri, 28 Oct 2022 16:55:17 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7B70D23A; Fri, 28 Oct 2022 09:55:16 -0700 (PDT) Received: from eglon.cambridge.arm.com (eglon.cambridge.arm.com [10.1.197.38]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 709F83F703; Fri, 28 Oct 2022 09:55:09 -0700 (PDT) From: James Morse <james.morse@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas <catalin.marinas@arm.com>, Mark Brown <broonie@kernel.org>, Will Deacon <will@kernel.org>, James Morse <james.morse@arm.com> Subject: [PATCH 12/38] arm64/sysreg: Standardise naming for ID_DFR1_EL1 Date: Fri, 28 Oct 2022 17:54:00 +0100 Message-Id: <20221028165426.1707896-13-james.morse@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221028165426.1707896-1-james.morse@arm.com> References: <20221028165426.1707896-1-james.morse@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221028_095510_741610_4FED84AC X-CRM114-Status: GOOD ( 12.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <linux-arm-kernel.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> List-Post: <mailto:linux-arm-kernel@lists.infradead.org> List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
Series |
arm64/sysreg: Convert aarch32 id regs
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diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 835b279f7f20..29d93a36eac9 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -706,7 +706,7 @@ #define ID_ISAR4_EL1_WithShifts_SHIFT 4 #define ID_ISAR4_EL1_Unpriv_SHIFT 0 -#define ID_DFR1_MTPMU_SHIFT 0 +#define ID_DFR1_EL1_MTPMU_SHIFT 0 #define ID_ISAR0_EL1_Divide_SHIFT 24 #define ID_ISAR0_EL1_Debug_SHIFT 20 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index f20bbe67f4de..a407e7b7e2b7 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -554,7 +554,7 @@ static const struct arm64_ftr_bits ftr_id_dfr0[] = { }; static const struct arm64_ftr_bits ftr_id_dfr1[] = { - S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_DFR1_MTPMU_SHIFT, 4, 0), + S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_DFR1_EL1_MTPMU_SHIFT, 4, 0), ARM64_FTR_END, };
To convert the 32bit id registers to use the sysreg generation, they must first have a regular pattern, to match the symbols the script generates. Ensure symbols for the ID_DFR1_EL1 register have an _EL1 suffix. No functional change. Signed-off-by: James Morse <james.morse@arm.com> --- arch/arm64/include/asm/sysreg.h | 2 +- arch/arm64/kernel/cpufeature.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)