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Thu, 03 Nov 2022 16:26:54 -0700 (PDT) Received: from localhost ([2607:fea8:a2e2:2d00:f1f0:c4d7:e39e:e2f]) by smtp.gmail.com with ESMTPSA id b19-20020a026f53000000b003743cc92b27sm638409jae.157.2022.11.03.16.26.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 16:26:53 -0700 (PDT) From: Richard Acayan To: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Sai Prakash Ranjan , Vinod Koul , Emma Anholt , Rob Clark , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v3 2/2] iommu: arm-smmu-qcom: add sdm670 compatible Date: Thu, 3 Nov 2022 19:26:32 -0400 Message-Id: <20221103232632.217324-3-mailingradian@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221103232632.217324-1-mailingradian@gmail.com> References: <20221103232632.217324-1-mailingradian@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221103_162655_737570_E572FA06 X-CRM114-Status: GOOD ( 14.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Snapdragon 670 needs the IOMMU for GENI I2C. Even though there is a generic compatible string to support it, it still needs special handling. The Adreno SMMU is separate, like Snapdragon 845, but the lack of PCI on SDM670 makes a reset quirk unnecessary. Add a compatible string to remove both built-in Adreno handling and reset quirk handling in SDM670. Signed-off-by: Richard Acayan --- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 3be81338a25b..89242aa2f29d 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -481,6 +481,13 @@ static const struct qcom_smmu_match_data qcom_smmu_data = { .adreno_impl = &qcom_adreno_smmu_500_impl, }; +static const struct qcom_smmu_match_data sdm670_smmu_500_data = { + /* SDM670 is the same as SDM845 except it doesn't have the reset quirk */ + .impl = &qcom_smmu_500_impl, + /* No adreno impl, on sdm670 it is handled by separete sdm670-smmu-v2. */ + /* No debug configuration */ +}; + static const struct qcom_smmu_match_data sdm845_smmu_500_data = { .impl = &sdm845_smmu_500_impl, /* No adreno impl, on sdm845 it is handled by separete sdm845-smmu-v2. */ @@ -506,6 +513,7 @@ static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = { { .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_500_impl0_data }, { .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_500_impl0_data }, { .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_v2_data }, + { .compatible = "qcom,sdm670-smmu-500", .data = &sdm670_smmu_500_data }, { .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_v2_data }, { .compatible = "qcom,sdm845-smmu-500", .data = &sdm845_smmu_500_data }, { .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_500_impl0_data },