| Message ID | 20221104131044.103241-3-marex@denx.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/3] dt-bindings: imx6q-pcie: Handle various clock configurations | expand |
On 04/11/2022 09:10, Marek Vasut wrote: > The i.MX6 and i.MX7D does not use block controller to toggle PCIe > reset, hence the PCIe DT description contains three reset entries > on these older SoCs. Add this exception into the binding document. > > Signed-off-by: Marek Vasut <marex@denx.de> > --- > Cc: Fabio Estevam <festevam@gmail.com> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Richard Zhu <hongxing.zhu@nxp.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: linux-arm-kernel@lists.infradead.org > Cc: NXP Linux Team <linux-imx@nxp.com> > To: devicetree@vger.kernel.org > --- > V2: - Add mx8mq to 3-reset PCIe core variant > - Handle the resets in allOf section > --- > .../bindings/pci/fsl,imx6q-pcie.yaml | 35 +++++++++++++++---- > 1 file changed, 28 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > index 2087dab95d679..f461ee2cd5c84 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > @@ -69,16 +69,9 @@ properties: > required properties for imx7d-pcie and imx8mq-pcie. > > resets: > - maxItems: 3 This must stay. You miss minItems: 2. > description: Phandles to PCIe-related reset lines exposed by SRC > IP block. Additional required by imx7d-pcie and imx8mq-pcie. > > - reset-names: Keep it here with minItems: 2 and maxItems :3 > - items: > - - const: pciephy > - - const: apps > - - const: turnoff > - > fsl,tx-deemph-gen1: > description: Gen1 De-emphasis value (optional required). > $ref: /schemas/types.yaml#/definitions/uint32 > @@ -270,6 +263,34 @@ allOf: > maxItems: 1 > power-domain-names: false > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx6q-pcie > + - fsl,imx6sx-pcie > + - fsl,imx6qp-pcie > + - fsl,imx7d-pcie > + - fsl,imx8mq-pcie > + then: > + properties: > + resets: > + maxItems: 3 > + reset-names: > + items: > + - const: pciephy > + - const: apps > + - const: turnoff > + else: > + properties: > + resets: > + maxItems: 2 > + reset-names: > + items: > + - const: apps > + - const: turnoff > + > examples: > - | > #include <dt-bindings/clock/imx6qdl-clock.h> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 2087dab95d679..f461ee2cd5c84 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -69,16 +69,9 @@ properties: required properties for imx7d-pcie and imx8mq-pcie. resets: - maxItems: 3 description: Phandles to PCIe-related reset lines exposed by SRC IP block. Additional required by imx7d-pcie and imx8mq-pcie. - reset-names: - items: - - const: pciephy - - const: apps - - const: turnoff - fsl,tx-deemph-gen1: description: Gen1 De-emphasis value (optional required). $ref: /schemas/types.yaml#/definitions/uint32 @@ -270,6 +263,34 @@ allOf: maxItems: 1 power-domain-names: false + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6q-pcie + - fsl,imx6sx-pcie + - fsl,imx6qp-pcie + - fsl,imx7d-pcie + - fsl,imx8mq-pcie + then: + properties: + resets: + maxItems: 3 + reset-names: + items: + - const: pciephy + - const: apps + - const: turnoff + else: + properties: + resets: + maxItems: 2 + reset-names: + items: + - const: apps + - const: turnoff + examples: - | #include <dt-bindings/clock/imx6qdl-clock.h>
The i.MX6 and i.MX7D does not use block controller to toggle PCIe reset, hence the PCIe DT description contains three reset entries on these older SoCs. Add this exception into the binding document. Signed-off-by: Marek Vasut <marex@denx.de> --- Cc: Fabio Estevam <festevam@gmail.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team <linux-imx@nxp.com> To: devicetree@vger.kernel.org --- V2: - Add mx8mq to 3-reset PCIe core variant - Handle the resets in allOf section --- .../bindings/pci/fsl,imx6q-pcie.yaml | 35 +++++++++++++++---- 1 file changed, 28 insertions(+), 7 deletions(-)