Message ID | 20221116091652.112620-1-b-kapoor@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2] arm64: dts: ti: k3-j721e-main: Remove ti,strobe-sel property | expand |
On 14:46-20221116, Bhavya Kapoor wrote: > According to latest errata of J721e [1], HS400 mode is not supported > in MMCSD0 subsystem (i2024) . Speed modes supported has been already ^^ space before "." btw, "The MMCSD peripherals do not support the Multimedia Card HS400 mode." is the exact text of the erratum. Even though it applies to instance 0. I think minor rewording will probably help people from running to search for which specific instances. > updated in commit eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems") Please format this correctly. > but it missed dropping 'ti,strobe-sel' property which is > only required by HS400 speed mode. > > Thus, drop 'ti,strobe-sel' property from kernel dtsi for J721e SoC. > > [1] https://www.ti.com/lit/er/sprz455/sprz455.pdf > > Fixes: eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems") > Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> > --- > > Changelog v1 -> v2 : > - Updated Commit Message based on what Nishanth Menon has told > in https://lore.kernel.org/all/20221115034324.6qpxl2774bzwbl3t@acorn/ > > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index 917c9dc99efa..e4748a838d83 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -1094,7 +1094,6 @@ > ti,itap-del-sel-mmc-hs = <0xa>; > ti,itap-del-sel-ddr52 = <0x3>; > ti,trm-icp = <0x8>; > - ti,strobe-sel = <0x77>; > dma-coherent; > }; > > -- > 2.20.1 >
On 17/11/22 12:56, Nishanth Menon wrote: > On 14:46-20221116, Bhavya Kapoor wrote: >> According to latest errata of J721e [1], HS400 mode is not supported >> in MMCSD0 subsystem (i2024) . Speed modes supported has been already > ^^ space before "." > > btw, "The MMCSD peripherals do not support the Multimedia Card HS400 > mode." is the exact text of the erratum. Even though it applies to > instance 0. I think minor rewording will probably help people from > running to search for which specific instances. > >> updated in commit eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems") > Please format this correctly. Commit Title was large ( > 72 chars ) so kept in same line. > >> but it missed dropping 'ti,strobe-sel' property which is >> only required by HS400 speed mode. >> >> Thus, drop 'ti,strobe-sel' property from kernel dtsi for J721e SoC. >> >> [1] https://www.ti.com/lit/er/sprz455/sprz455.pdf >> >> Fixes: eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems") >> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> >> --- >> >> Changelog v1 -> v2 : >> - Updated Commit Message based on what Nishanth Menon has told >> in https://lore.kernel.org/all/20221115034324.6qpxl2774bzwbl3t@acorn/ >> >> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 - >> 1 file changed, 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> index 917c9dc99efa..e4748a838d83 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> @@ -1094,7 +1094,6 @@ >> ti,itap-del-sel-mmc-hs = <0xa>; >> ti,itap-del-sel-ddr52 = <0x3>; >> ti,trm-icp = <0x8>; >> - ti,strobe-sel = <0x77>; >> dma-coherent; >> }; >> >> -- >> 2.20.1 >>
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 917c9dc99efa..e4748a838d83 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1094,7 +1094,6 @@ ti,itap-del-sel-mmc-hs = <0xa>; ti,itap-del-sel-ddr52 = <0x3>; ti,trm-icp = <0x8>; - ti,strobe-sel = <0x77>; dma-coherent; };
According to latest errata of J721e [1], HS400 mode is not supported in MMCSD0 subsystem (i2024) . Speed modes supported has been already updated in commit eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems") but it missed dropping 'ti,strobe-sel' property which is only required by HS400 speed mode. Thus, drop 'ti,strobe-sel' property from kernel dtsi for J721e SoC. [1] https://www.ti.com/lit/er/sprz455/sprz455.pdf Fixes: eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> --- Changelog v1 -> v2 : - Updated Commit Message based on what Nishanth Menon has told in https://lore.kernel.org/all/20221115034324.6qpxl2774bzwbl3t@acorn/ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 - 1 file changed, 1 deletion(-)