From patchwork Thu Nov 17 13:24:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 13046890 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1BD1DC4332F for ; Thu, 17 Nov 2022 13:29:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=nofZGWUVBDbLk14M287yIPrcwxFwJOBt2iyQtb8wMkM=; b=uT01OSxo2I3/YA BKoh3KZGoT3VWDswQbEA5wly+fLgbs5/JUH9vghYByQMmp/rk3cPiISt73vYT2/ZUKBh8/2d0N4+M /bvLISyihHji4kwr5FoQ85jB7w6lCh9uzjTsr2A6PIcNuprDsTv+SeQER9aW1VVNX3plU48gu9J2T MghxlU85Jk4WALP/hngrYHSbepxN3JjUMGAc8vrr11zAaR4qEXrTb7vJQxVj/BUvpOQDkNzRaZACo To1hA2xQCTYXI3lt/LWHnwRgTIXVAKrWGWYU/NnK3vUsojUvg3zPL5MGGGOvTiy6UAx0VKHJABv+w vmRLBHjGkzBNO0krv4Zw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ovewR-00EGzv-GU; Thu, 17 Nov 2022 13:28:32 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ovesq-00EEVU-Np for linux-arm-kernel@lists.infradead.org; Thu, 17 Nov 2022 13:24:51 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 13E3761E10; Thu, 17 Nov 2022 13:24:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 639A9C43141; Thu, 17 Nov 2022 13:24:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668691487; bh=0GhLy5Cshy5IkVgnhpWwU/ogaFYRS/icDGallZ9wCJ4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UZcdQLx0Cyeaca1CcXity/d8UXAuNs0szXK6+KxGoUnxZs3JdLzckPDB3N74bEh6E E54doMy9orPPNsIaLrqzZOPauh8kxRxtb12n594pxCI5DQ5hBhZMAoxYbBlY/Hrgt7 pnIjBCt3gO+eDkE/mJIeU9tnYyYBuMEvHi8x9CKgsifhoasGn2XJ6GbuiDWgmJs51C Uun+HR/RsTsjUT5kjxmvnvNrKbjO8JbI7P/+2Gz/MxKWtjnjJIO8uBBfhU/87ICiFK 0B+OgFHn0Wb8kWVDb5YRWJiqd4o8vLCfVZQwXanr0bvEYWMI2vLERmXi9geyJaPoTv 5mRPXleLdgVgA== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: Ard Biesheuvel , Marc Zyngier , Will Deacon , Mark Rutland , Kees Cook , Catalin Marinas , Mark Brown , Anshuman Khandual , Richard Henderson Subject: [RFC PATCH 7/7] arm64: Enable 52-bit virtual addressing for 16k granule configs Date: Thu, 17 Nov 2022 14:24:23 +0100 Message-Id: <20221117132423.1252942-8-ardb@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221117132423.1252942-1-ardb@kernel.org> References: <20221117132423.1252942-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3089; i=ardb@kernel.org; h=from:subject; bh=0GhLy5Cshy5IkVgnhpWwU/ogaFYRS/icDGallZ9wCJ4=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBjdjYGsDU++l6LE1z/Be6QaeILyf8UFBmzOz37hUpD OGv2e4uJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCY3Y2BgAKCRDDTyI5ktmPJMdpDA CL1ceEL6pxwe9iAHbVjMgyvleCuY0tepV/rOz649PMF9A1a0czMgYPLAEKiniYJuHX1dfyH6C/Ik3d yleZJPpAHkp2SmTyLBzWKPntPLN9WYcffYBfK3COUqwg1cp7eokfAi8f0I6aWeIf3gAgcEuYYlXQMp dDAX0YH8Tm+Yw+tNKHlRgk6fMvRkq2kIHLopRzIYm+0ucRAtwMttzegphAoCcKPswH2BJIzsr4q89p GGnOuUHWoG2Dd3qr40VA2cYoc8m9DZrqDoMvp72qyWZK+D7OcmfUJSOOyfklzdIiU8js2gcwtJE/6x XhxwQ6F7aTS3n9zRZyYNp97AMAAXD/6MouXUon6zmStjJg9aMMqqlZBDtNEjNuI/ZDnz/im2tzvBmM /4PfNwLHL3Hg16Rnyydww8+bbYcEBGuKxVL5EYiojjqOrVZwUcT91zfLY3RVtdTMb5vuq0hkti43bz vXxZtEZ+G4sqTD/AX4sDP5Ynkx1aG7SpiCfgAiiwobCD0= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221117_052448_909426_A4AC7D18 X-CRM114-Status: GOOD ( 15.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update Kconfig to permit 16k granule configurations to be built with 52-bit virtual addressing, now that all the prerequisites are in place. While at it, update the feature description so it matches on the appropriate feature bits depending on the page size. For simplicity, let's just keep ARM64_HAS_LVA as the feature name. Signed-off-by: Ard Biesheuvel --- arch/arm64/Kconfig | 6 ++++-- arch/arm64/kernel/cpufeature.c | 22 ++++++++++++++++---- 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 79ec4bc05694acec..aece91a774a84276 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -344,6 +344,7 @@ config PGTABLE_LEVELS default 3 if ARM64_64K_PAGES && (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39 default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47 + default 4 if ARM64_16K_PAGES && (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48 config ARCH_SUPPORTS_UPROBES @@ -1197,7 +1198,8 @@ config ARM64_VA_BITS_48 config ARM64_VA_BITS_52 bool "52-bit" - depends on ARM64_64K_PAGES && (ARM64_PAN || !ARM64_SW_TTBR0_PAN) + depends on ARM64_64K_PAGES || ARM64_16K_PAGES + depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN help Enable 52-bit virtual addressing for userspace when explicitly requested via a hint to mmap(). The kernel will also use 52-bit @@ -1247,7 +1249,7 @@ config ARM64_PA_BITS_48 config ARM64_PA_BITS_52 bool "52-bit (ARMv8.2)" - depends on ARM64_64K_PAGES + depends on ARM64_64K_PAGES || ARM64_16K_PAGES depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN help Enable support for a 52-bit physical address space, introduced as diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index d19f9c1a93d9d000..05c46e9c1b5a4c9c 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2663,15 +2663,29 @@ static const struct arm64_cpu_capabilities arm64_features[] = { }, #ifdef CONFIG_ARM64_VA_BITS_52 { - .desc = "52-bit Virtual Addressing (LVA)", .capability = ARM64_HAS_LVA, .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, - .sys_reg = SYS_ID_AA64MMFR2_EL1, - .sign = FTR_UNSIGNED, + .matches = has_cpuid_feature, .field_width = 4, +#ifdef CONFIG_ARM64_64K_PAGES + .desc = "52-bit Virtual Addressing (LVA)", + .sign = FTR_SIGNED, + .sys_reg = SYS_ID_AA64MMFR2_EL1, .field_pos = ID_AA64MMFR2_EL1_VARange_SHIFT, - .matches = has_cpuid_feature, .min_field_value = ID_AA64MMFR2_EL1_VARange_52, +#else + .desc = "52-bit Virtual Addressing (LPA2)", + .sys_reg = SYS_ID_AA64MMFR0_EL1, +#ifdef CONFIG_ARM64_4K_PAGES + .sign = FTR_SIGNED, + .field_pos = ID_AA64MMFR0_EL1_TGRAN4_SHIFT, + .min_field_value = ID_AA64MMFR0_EL1_TGRAN4_52_BIT, +#else + .sign = FTR_UNSIGNED, + .field_pos = ID_AA64MMFR0_EL1_TGRAN16_SHIFT, + .min_field_value = ID_AA64MMFR0_EL1_TGRAN16_52_BIT, +#endif +#endif }, #endif {},