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[91.114.0.140]) by smtp.gmail.com with ESMTPSA id w11-20020a05620a444b00b006fb72dbbaa4sm10084441qkp.27.2022.11.22.05.23.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Nov 2022 05:23:39 -0800 (PST) From: Peter Suti To: Ulf Hansson , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Heiner Kallweit Cc: Peter Suti , linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] mmc: meson-gx: fix SDIO interrupt handling Date: Tue, 22 Nov 2022 14:23:03 +0100 Message-Id: <20221122132304.1482508-1-peter.suti@streamunlimited.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221122_052343_739779_77D9B0E8 X-CRM114-Status: GOOD ( 17.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org With the interrupt support introduced in commit 066ecde sometimes the Marvell-8987 wifi chip entered a deadlock using the marvell-sd-uapsta-8987 vendor driver. The cause seems to be that sometimes the interrupt handler handles 2 IRQs and one of them disables the interrupts which are not reenabled when all interrupts are finished. To work around this, disable all interrupts when we are in the IRQ context and reenable them when the current IRQ is handled. Fixes: 066ecde ("mmc: meson-gx: add SDIO interrupt support") Signed-off-by: Peter Suti --- Changes in v2: - use spin_lock instead of spin_lock_irqsave - only reenable interrupts if they were enabled already drivers/mmc/host/meson-gx-mmc.c | 30 +++++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 6e5ea0213b47..0c95f8640b34 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -934,6 +934,13 @@ static void meson_mmc_read_resp(struct mmc_host *mmc, struct mmc_command *cmd) } } +static bool __meson_mmc_sdio_irq_is_enabled(struct mmc_host *mmc) +{ + struct meson_host *host = mmc_priv(mmc); + + return readl(host->regs + SD_EMMC_IRQ_EN) & IRQ_SDIO; +} + static void __meson_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) { struct meson_host *host = mmc_priv(mmc); @@ -950,6 +957,11 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) struct mmc_command *cmd; u32 status, raw_status; irqreturn_t ret = IRQ_NONE; + bool irq_enabled; + + spin_lock(&host->lock); + irq_enabled = __meson_mmc_sdio_irq_is_enabled(host->mmc); + __meson_mmc_enable_sdio_irq(host->mmc, 0); raw_status = readl(host->regs + SD_EMMC_STATUS); status = raw_status & (IRQ_EN_MASK | IRQ_SDIO); @@ -958,11 +970,11 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) dev_dbg(host->dev, "Unexpected IRQ! irq_en 0x%08lx - status 0x%08x\n", IRQ_EN_MASK | IRQ_SDIO, raw_status); - return IRQ_NONE; + goto out_unlock; } if (WARN_ON(!host)) - return IRQ_NONE; + goto out_unlock; /* ack all raised interrupts */ writel(status, host->regs + SD_EMMC_STATUS); @@ -970,17 +982,16 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) cmd = host->cmd; if (status & IRQ_SDIO) { - spin_lock(&host->lock); - __meson_mmc_enable_sdio_irq(host->mmc, 0); sdio_signal_irq(host->mmc); - spin_unlock(&host->lock); status &= ~IRQ_SDIO; - if (!status) + if (!status) { + spin_unlock(&host->lock); return IRQ_HANDLED; + } } if (WARN_ON(!cmd)) - return IRQ_NONE; + goto out_unlock; cmd->error = 0; if (status & IRQ_CRC_ERR) { @@ -1023,6 +1034,11 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) if (ret == IRQ_HANDLED) meson_mmc_request_done(host->mmc, cmd->mrq); +out_unlock: + if (irq_enabled) + __meson_mmc_enable_sdio_irq(host->mmc, 1); + spin_unlock(&host->lock); + return ret; }