From patchwork Sat Nov 26 22:47:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13056590 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C90BFC43217 for ; Sat, 26 Nov 2022 22:49:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=q558iHV3ArpHqaUKy+R881yDcOwEkDBnA+DDiHxEICE=; b=CiAL2xI5xCcmyE +DNPDW79lGVxMC7dnaGptioIsN1mHwWrZh/ie6uNElqb7XbqqYRlS2OB7roexZ+veWdPogxsc/uYl ETRJulRFjXphJmD9sKlEjrGOlat3/9ABFvZ+yCb5Uu3Q9LqFzuJE48BbpyYRjvIIbK2ZC+Qc/4moR /UcZC4qeRQU5fT7YdJeZdyqZj99gLTqbu7cqj0F2G7iDNrs5bRy3SVD+/7jIkUtFpETcshlXVs0rf sCym1xr/589ETNhAvgKFTlPmxkVrqIoorOsandbAAhs/bC+z6mbduArbEdODUkBdsVrEH5DenEasJ U12Q18TXbE7RXsOTfQ8A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oz3yO-008UhE-Qx; Sat, 26 Nov 2022 22:48:36 +0000 Received: from phobos.denx.de ([85.214.62.61]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oz3xy-008UZT-7r for linux-arm-kernel@lists.infradead.org; Sat, 26 Nov 2022 22:48:12 +0000 Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 928C98515B; Sat, 26 Nov 2022 23:48:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1669502887; bh=86EZTKhDRuaKl90lBCm/6wx1bcdIhb81P9lvZE5GnjA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=v1UC3wpzOiG7i9imUy7Chv7st1ijjSGBf0E4iyOryHIXbooEb6k9mDUgD4fKTFLEI 6+D7Y5iD7leDPqiRDBEJ8Lqp6hXl+qTcDc6pQzyBdixZp4ytMghnSMngapN8CF5yrg e88Jyg8O0om2liC9l9JBxPsEswFhf6kN3kYdgScqesvm5f1LmH1ok8kDj4aKXX/taY caPpvMBWLy7lT7nhcqydIMG4Je4RPADeqJmktmSLoOW8jszwEtdQodJxGg1Im+44En z92ZBMM7sMxpmryXMe9xjBsiRJvh2BtExzcjUhYXXWANeAmrQMah6l2ImQvmk87Vh0 330mXCT49b05A== From: Marek Vasut To: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Adam Ford , Alice Guo , Amit Kucheria , Daniel Lezcano , Fabio Estevam , Krzysztof Kozlowski , Li Jun , Lucas Stach , Markus Niebel , NXP Linux Team , Peng Fan , Pengutronix Kernel Team , "Rafael J . Wysocki" , Richard Cochran , Rob Herring , Sascha Hauer , Shawn Guo , Zhang Rui , devicetree@vger.kernel.org Subject: [PATCH 4/5] arm64: dts: imx8m: Add TMU phandle to calibration data in OCOTP Date: Sat, 26 Nov 2022 23:47:39 +0100 Message-Id: <20221126224740.311625-4-marex@denx.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221126224740.311625-1-marex@denx.de> References: <20221126224740.311625-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221126_144810_603548_C7ACD0D4 X-CRM114-Status: GOOD ( 11.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with calibration values in OCOTP. Add the OCOTP calibration values phandle so the TMU driver can perform this programming. The MX8MM/MX8MN TMUv1 uses only one OCOTP cell, while MX8MP TMUv2 uses 4. Signed-off-by: Marek Vasut Reviewed-by: Peng Fan --- Cc: Adam Ford Cc: Alice Guo Cc: Amit Kucheria Cc: Daniel Lezcano Cc: Fabio Estevam Cc: Krzysztof Kozlowski Cc: Li Jun Cc: Lucas Stach Cc: Markus Niebel Cc: NXP Linux Team Cc: Peng Fan Cc: Pengutronix Kernel Team Cc: Rafael J. Wysocki Cc: Richard Cochran Cc: Rob Herring Cc: Sascha Hauer Cc: Shawn Guo Cc: Zhang Rui Cc: devicetree@vger.kernel.org To: linux-pm@vger.kernel.org To: linux-arm-kernel@lists.infradead.org --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++ 3 files changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 513c2de0caa15..0cd7fff47c44d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -496,6 +496,8 @@ tmu: tmu@30260000 { compatible = "fsl,imx8mm-tmu"; reg = <0x30260000 0x10000>; clocks = <&clk IMX8MM_CLK_TMU_ROOT>; + nvmem-cells = <&tmu_calib>; + nvmem-cell-names = "calib"; #thermal-sensor-cells = <0>; }; @@ -584,6 +586,10 @@ cpu_speed_grade: speed-grade@10 { /* 0x440 */ reg = <0x10 4>; }; + tmu_calib: calib@3c { /* 0x4f0 */ + reg = <0x3c 4>; + }; + fec_mac_address: mac-address@90 { /* 0x640 */ reg = <0x90 6>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index 068f599cdf757..5eef9b274edde 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -498,6 +498,8 @@ tmu: tmu@30260000 { compatible = "fsl,imx8mn-tmu", "fsl,imx8mm-tmu"; reg = <0x30260000 0x10000>; clocks = <&clk IMX8MN_CLK_TMU_ROOT>; + nvmem-cells = <&tmu_calib>; + nvmem-cell-names = "calib"; #thermal-sensor-cells = <0>; }; @@ -585,6 +587,10 @@ cpu_speed_grade: speed-grade@10 { /* 0x440 */ reg = <0x10 4>; }; + tmu_calib: calib@3c { /* 0x4f0 */ + reg = <0x3c 4>; + }; + fec_mac_address: mac-address@90 { /* 0x640 */ reg = <0x90 6>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index ddcd5e23ba47d..0173e394ad4d8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -380,6 +380,8 @@ tmu: tmu@30260000 { compatible = "fsl,imx8mp-tmu"; reg = <0x30260000 0x10000>; clocks = <&clk IMX8MP_CLK_TSENSOR_ROOT>; + nvmem-cells = <&tmu_calib>; + nvmem-cell-names = "calib"; #thermal-sensor-cells = <1>; }; @@ -454,6 +456,10 @@ eth_mac1: mac-address@90 { /* 0x640 */ eth_mac2: mac-address@96 { /* 0x658 */ reg = <0x96 6>; }; + + tmu_calib: calib@264 { /* 0xd90-0xdc0 */ + reg = <0x264 0x10>; + }; }; anatop: clock-controller@30360000 {