diff mbox series

[RFC,1/1] ARM: Drop !ARCH_MULTIPLATFORM dependency from Cortex A8/9 erratas

Message ID 20221209182000.549179-1-sebastian.reichel@collabora.com (mailing list archive)
State New, archived
Headers show
Series [RFC,1/1] ARM: Drop !ARCH_MULTIPLATFORM dependency from Cortex A8/9 erratas | expand

Commit Message

Sebastian Reichel Dec. 9, 2022, 6:20 p.m. UTC
All the erratas for more recent CPUs (Cortex A15/A12/A17) do not
require !ARCH_MULTIPLATFORM, since there is runtime detection of
effected CPUs in arch/arm/mm/proc-v7.S.

Errata config options for the older Cortex A8/A9 CPUs have the
!ARCH_MULTIPLATFORM dependency, but the CPUs are also runtime
detected. Since there is runtime detection, it should be fine
to enable the erratas for a multi platform kernel.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
For me the most likely explanation that this has not yet happened is
me missing an important detail, so I sent it as RFC. If you point it
out I will try to document the reason.
---
 arch/arm/Kconfig | 6 ------
 1 file changed, 6 deletions(-)

Comments

Russell King (Oracle) Dec. 9, 2022, 6:45 p.m. UTC | #1
On Fri, Dec 09, 2022 at 07:20:00PM +0100, Sebastian Reichel wrote:
> All the erratas for more recent CPUs (Cortex A15/A12/A17) do not
> require !ARCH_MULTIPLATFORM, since there is runtime detection of
> effected CPUs in arch/arm/mm/proc-v7.S.
> 
> Errata config options for the older Cortex A8/A9 CPUs have the
> !ARCH_MULTIPLATFORM dependency, but the CPUs are also runtime
> detected. Since there is runtime detection, it should be fine
> to enable the erratas for a multi platform kernel.
> 
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> ---
> For me the most likely explanation that this has not yet happened is
> me missing an important detail, so I sent it as RFC. If you point it
> out I will try to document the reason.

IIRC, the reason these are marked with !ARCH_MULTIPLATFORM is for when
the kernel is running in the non-secure world - the accessed registers
may prevent platforms booting. However, it was a long time ago and I
don't remember clearly now.
Arnd Bergmann Dec. 9, 2022, 9:36 p.m. UTC | #2
On Fri, Dec 9, 2022, at 19:45, Russell King (Oracle) wrote:
> On Fri, Dec 09, 2022 at 07:20:00PM +0100, Sebastian Reichel wrote:
>> All the erratas for more recent CPUs (Cortex A15/A12/A17) do not
>> require !ARCH_MULTIPLATFORM, since there is runtime detection of
>> effected CPUs in arch/arm/mm/proc-v7.S.
>> 
>> Errata config options for the older Cortex A8/A9 CPUs have the
>> !ARCH_MULTIPLATFORM dependency, but the CPUs are also runtime
>> detected. Since there is runtime detection, it should be fine
>> to enable the erratas for a multi platform kernel.
>> 
>> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
>> ---
>> For me the most likely explanation that this has not yet happened is
>> me missing an important detail, so I sent it as RFC. If you point it
>> out I will try to document the reason.
>
> IIRC, the reason these are marked with !ARCH_MULTIPLATFORM is for when
> the kernel is running in the non-secure world - the accessed registers
> may prevent platforms booting. However, it was a long time ago and I
> don't remember clearly now.

The git log confirms your memory, this is the description of
commit 62e4d357aae0 ("ARM: 7609/1: disable errata work-arounds
which access secure registers"):

    In order to support secure and non-secure platforms in multi-platform
    kernels, errata work-arounds that access secure only registers need to
    be disabled. Make all the errata options that fit in this category
    depend on !CONFIG_ARCH_MULTIPLATFORM.
    
    This will effectively remove the errata options as platforms are
    converted over to multi-platform.
    
    Signed-off-by: Rob Herring <rob.herring@calxeda.com>
    Acked-by: Tony Lindgren <tony@atomide.com>
    Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

As far as I understand, these are all boot time chicken bits that
should already be set up by the boot loader before entering the
kernel. Sebastian, are you aware of any particular machines that
ship without the workaround code in the bootloader or in secure
world?

    Arnd
Sebastian Reichel Dec. 10, 2022, 2:55 a.m. UTC | #3
Hi,

On Fri, Dec 09, 2022 at 10:36:17PM +0100, Arnd Bergmann wrote:
> On Fri, Dec 9, 2022, at 19:45, Russell King (Oracle) wrote:
> > On Fri, Dec 09, 2022 at 07:20:00PM +0100, Sebastian Reichel wrote:
> >> All the erratas for more recent CPUs (Cortex A15/A12/A17) do not
> >> require !ARCH_MULTIPLATFORM, since there is runtime detection of
> >> effected CPUs in arch/arm/mm/proc-v7.S.
> >> 
> >> Errata config options for the older Cortex A8/A9 CPUs have the
> >> !ARCH_MULTIPLATFORM dependency, but the CPUs are also runtime
> >> detected. Since there is runtime detection, it should be fine
> >> to enable the erratas for a multi platform kernel.
> >> 
> >> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> >> ---
> >> For me the most likely explanation that this has not yet happened is
> >> me missing an important detail, so I sent it as RFC. If you point it
> >> out I will try to document the reason.
> >
> > IIRC, the reason these are marked with !ARCH_MULTIPLATFORM is for when
> > the kernel is running in the non-secure world - the accessed registers
> > may prevent platforms booting. However, it was a long time ago and I
> > don't remember clearly now.
> 
> The git log confirms your memory, this is the description of
> commit 62e4d357aae0 ("ARM: 7609/1: disable errata work-arounds
> which access secure registers"):
> 
>     In order to support secure and non-secure platforms in multi-platform
>     kernels, errata work-arounds that access secure only registers need to
>     be disabled. Make all the errata options that fit in this category
>     depend on !CONFIG_ARCH_MULTIPLATFORM.
>     
>     This will effectively remove the errata options as platforms are
>     converted over to multi-platform.
>     
>     Signed-off-by: Rob Herring <rob.herring@calxeda.com>
>     Acked-by: Tony Lindgren <tony@atomide.com>
>     Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> 
> As far as I understand, these are all boot time chicken bits that
> should already be set up by the boot loader before entering the
> kernel. 

Ah, I should have spent more time in the git history instead of
trying to search the mailing list :( I will propose a patch adding
a sentence to the config option helptexts, so that one does not need
to go through the git history to understand the requirement and
correct solution:

This errata workaround requires access to secure registers and thus
is not available on multiplatform kernels. The workaround should be
applied by the bootloader instead.

> Sebastian, are you aware of any particular machines that ship
> without the workaround code in the bootloader or in secure world?

No. I'm investigating sporadic GPU hungs on i.MX6QP on a customer
device and just noticed a couple of erratas missing in the .config.
They might already be enabled in the bootloader (and otherwise
definitely can be enabled there).

Thanks for the fast feedback!

-- Sebastian
diff mbox series

Patch

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a08c9d092a33..fafb02e38507 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -647,7 +647,6 @@  config ARM_ERRATA_430973
 config ARM_ERRATA_458693
 	bool "ARM errata: Processor deadlock when a false hazard is created"
 	depends on CPU_V7
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  This option enables the workaround for the 458693 Cortex-A8 (r2p0)
 	  erratum. For very specific sequences of memory operations, it is
@@ -661,7 +660,6 @@  config ARM_ERRATA_458693
 config ARM_ERRATA_460075
 	bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
 	depends on CPU_V7
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  This option enables the workaround for the 460075 Cortex-A8 (r2p0)
 	  erratum. Any asynchronous access to the L2 cache may encounter a
@@ -674,7 +672,6 @@  config ARM_ERRATA_460075
 config ARM_ERRATA_742230
 	bool "ARM errata: DMB operation may be faulty"
 	depends on CPU_V7 && SMP
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  This option enables the workaround for the 742230 Cortex-A9
 	  (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
@@ -687,7 +684,6 @@  config ARM_ERRATA_742230
 config ARM_ERRATA_742231
 	bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
 	depends on CPU_V7 && SMP
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  This option enables the workaround for the 742231 Cortex-A9
 	  (r2p0..r2p2) erratum. Under certain conditions, specific to the
@@ -725,7 +721,6 @@  config ARM_ERRATA_720789
 config ARM_ERRATA_743622
 	bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
 	depends on CPU_V7
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  This option enables the workaround for the 743622 Cortex-A9
 	  (r2p*) erratum. Under very rare conditions, a faulty
@@ -739,7 +734,6 @@  config ARM_ERRATA_743622
 config ARM_ERRATA_751472
 	bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
 	depends on CPU_V7
-	depends on !ARCH_MULTIPLATFORM
 	help
 	  This option enables the workaround for the 751472 Cortex-A9 (prior
 	  to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the