diff mbox series

arm64: dts: imx8mp: Add Hantro G1, G2, VC8000E DT nodes

Message ID 20221218010626.197980-1-marex@denx.de (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mp: Add Hantro G1, G2, VC8000E DT nodes | expand

Commit Message

Marek Vasut Dec. 18, 2022, 1:06 a.m. UTC
Add DT nodes for the Hantro VPU found in i.MX8MP SoC.

Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Alexander Stein <alexander.stein@ew.tq-group.com>
Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jacky Bai <ping.bai@nxp.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 36 +++++++++++++++++++++++
 1 file changed, 36 insertions(+)

Comments

Laurent Pinchart Dec. 18, 2022, 1:36 a.m. UTC | #1
Hi Marek,

Thank you for the patch.

On Sun, Dec 18, 2022 at 02:06:26AM +0100, Marek Vasut wrote:
> Add DT nodes for the Hantro VPU found in i.MX8MP SoC.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
> Cc: Abel Vesa <abel.vesa@nxp.com>
> Cc: Adam Ford <aford173@gmail.com>
> Cc: Alexander Stein <alexander.stein@ew.tq-group.com>
> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Jacky Bai <ping.bai@nxp.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Richard Cochran <richardcochran@gmail.com>
> Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> To: linux-arm-kernel@lists.infradead.org
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 36 +++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 34c2c80c47eb5..5040b3a545c32 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1639,6 +1639,39 @@ gpu2d: gpu@38008000 {
>  			power-domains = <&pgc_gpu2d>;
>  		};
>  
> +		vpu_g1: video-codec@38300000 {
> +			compatible = "nxp,imx8mm-vpu-g1";
> +			reg = <0x38300000 0x10000>;
> +			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> +			assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
> +			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> +			assigned-clock-rates = <700000000>;
> +			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
> +		};
> +
> +		vpu_g2: video-codec@38310000 {
> +			compatible = "nxp,imx8mq-vpu-g2";
> +			reg = <0x38310000 0x10000>;
> +			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> +			assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
> +			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> +			assigned-clock-rates = <700000000>;
> +			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
> +		};
> +
> +		vpu_vc8000e: vpu_vc8000e@38320000 {
> +			compatible = "nxp,imx8mp-vpu-vc8000e";

I tried to look for the patch that defined this compatible value, but
couldn't find it. Same for driver support. Have they been posted
somewhere ?

> +			reg = <0x38320000 0x10000>;
> +			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> +			assigned-clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> +			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> +			assigned-clock-rates = <700000000>;
> +			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_VC8000E>;
> +		};
> +
>  		vpumix_blk_ctrl: blk-ctrl@38330000 {
>  			compatible = "fsl,imx8mp-vpu-blk-ctrl", "syscon";
>  			reg = <0x38330000 0x100>;
> @@ -1650,6 +1683,9 @@ vpumix_blk_ctrl: blk-ctrl@38330000 {
>  				 <&clk IMX8MP_CLK_VPU_G2_ROOT>,
>  				 <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
>  			clock-names = "g1", "g2", "vc8000e";
> +			assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>;
> +			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> +			assigned-clock-rates = <700000000>;
>  			interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>,
>  					<&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,
>  					<&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>;
Marek Vasut Dec. 18, 2022, 2:37 a.m. UTC | #2
On 12/18/22 02:36, Laurent Pinchart wrote:

Hi,

[...]

>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> index 34c2c80c47eb5..5040b3a545c32 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> @@ -1639,6 +1639,39 @@ gpu2d: gpu@38008000 {
>>   			power-domains = <&pgc_gpu2d>;
>>   		};
>>   
>> +		vpu_g1: video-codec@38300000 {
>> +			compatible = "nxp,imx8mm-vpu-g1";
>> +			reg = <0x38300000 0x10000>;
>> +			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
>> +			assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
>> +			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
>> +			assigned-clock-rates = <700000000>;
>> +			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
>> +		};
>> +
>> +		vpu_g2: video-codec@38310000 {
>> +			compatible = "nxp,imx8mq-vpu-g2";
>> +			reg = <0x38310000 0x10000>;
>> +			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
>> +			assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
>> +			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
>> +			assigned-clock-rates = <700000000>;
>> +			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
>> +		};
>> +
>> +		vpu_vc8000e: vpu_vc8000e@38320000 {
>> +			compatible = "nxp,imx8mp-vpu-vc8000e";
> 
> I tried to look for the patch that defined this compatible value, but
> couldn't find it. Same for driver support. Have they been posted
> somewhere ?

Not the vc8000e to my knowledge, the other two are upstream.
Adam Ford Dec. 18, 2022, 4:16 a.m. UTC | #3
On Sat, Dec 17, 2022 at 8:37 PM Marek Vasut <marex@denx.de> wrote:
>
> On 12/18/22 02:36, Laurent Pinchart wrote:
>
> Hi,
>
> [...]
>
> >> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> >> index 34c2c80c47eb5..5040b3a545c32 100644
> >> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> >> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> >> @@ -1639,6 +1639,39 @@ gpu2d: gpu@38008000 {
> >>                      power-domains = <&pgc_gpu2d>;
> >>              };
> >>
> >> +            vpu_g1: video-codec@38300000 {
> >> +                    compatible = "nxp,imx8mm-vpu-g1";
> >> +                    reg = <0x38300000 0x10000>;
> >> +                    interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> >> +                    clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> >> +                    assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
> >> +                    assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> >> +                    assigned-clock-rates = <700000000>;
> >> +                    power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
> >> +            };
> >> +
> >> +            vpu_g2: video-codec@38310000 {
> >> +                    compatible = "nxp,imx8mq-vpu-g2";
> >> +                    reg = <0x38310000 0x10000>;
> >> +                    interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> >> +                    clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> >> +                    assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
> >> +                    assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> >> +                    assigned-clock-rates = <700000000>;
> >> +                    power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
> >> +            };
> >> +
> >> +            vpu_vc8000e: vpu_vc8000e@38320000 {
> >> +                    compatible = "nxp,imx8mp-vpu-vc8000e";
> >
> > I tried to look for the patch that defined this compatible value, but
> > couldn't find it. Same for driver support. Have they been posted
> > somewhere ?
>
> Not the vc8000e to my knowledge, the other two are upstream.

For what it's worth, I'm still working on getting my imx8mp up and
running with a mainline kernel, but the g1 and g2 enumerate:

[    7.039007] hantro-vpu 38300000.video-codec: registered
nxp,imx8mm-vpu-g1-dec as /dev/video0
[    7.054049] hantro-vpu 38310000.video-codec: registered
nxp,imx8mq-vpu-g2-dec as /dev/video1

I'm hoping to get a more mainline version of g-streamer to be able to
do video decoding and run some fluster tests, but I want to get HDMI
and DSI video working before I'll have more time to spend on the
decoders.
If there isn't a driver for the vc8000e, I wonder if it wouldn't make
sense to post a V2 with just the G1 and G2 decoders enabled.

adam
Marek Vasut Dec. 18, 2022, 4:21 a.m. UTC | #4
On 12/18/22 05:16, Adam Ford wrote:
> On Sat, Dec 17, 2022 at 8:37 PM Marek Vasut <marex@denx.de> wrote:
>>
>> On 12/18/22 02:36, Laurent Pinchart wrote:
>>
>> Hi,
>>
>> [...]
>>
>>>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>>>> index 34c2c80c47eb5..5040b3a545c32 100644
>>>> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>>>> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>>>> @@ -1639,6 +1639,39 @@ gpu2d: gpu@38008000 {
>>>>                       power-domains = <&pgc_gpu2d>;
>>>>               };
>>>>
>>>> +            vpu_g1: video-codec@38300000 {
>>>> +                    compatible = "nxp,imx8mm-vpu-g1";
>>>> +                    reg = <0x38300000 0x10000>;
>>>> +                    interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
>>>> +                    clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
>>>> +                    assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
>>>> +                    assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
>>>> +                    assigned-clock-rates = <700000000>;
>>>> +                    power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
>>>> +            };
>>>> +
>>>> +            vpu_g2: video-codec@38310000 {
>>>> +                    compatible = "nxp,imx8mq-vpu-g2";
>>>> +                    reg = <0x38310000 0x10000>;
>>>> +                    interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
>>>> +                    clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
>>>> +                    assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
>>>> +                    assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
>>>> +                    assigned-clock-rates = <700000000>;
>>>> +                    power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
>>>> +            };
>>>> +
>>>> +            vpu_vc8000e: vpu_vc8000e@38320000 {
>>>> +                    compatible = "nxp,imx8mp-vpu-vc8000e";
>>>
>>> I tried to look for the patch that defined this compatible value, but
>>> couldn't find it. Same for driver support. Have they been posted
>>> somewhere ?
>>
>> Not the vc8000e to my knowledge, the other two are upstream.
> 
> For what it's worth, I'm still working on getting my imx8mp up and
> running with a mainline kernel, but the g1 and g2 enumerate:
> 
> [    7.039007] hantro-vpu 38300000.video-codec: registered
> nxp,imx8mm-vpu-g1-dec as /dev/video0
> [    7.054049] hantro-vpu 38310000.video-codec: registered
> nxp,imx8mq-vpu-g2-dec as /dev/video1
> 
> I'm hoping to get a more mainline version of g-streamer to be able to
> do video decoding and run some fluster tests, but I want to get HDMI
> and DSI video working before I'll have more time to spend on the
> decoders.
> If there isn't a driver for the vc8000e, I wonder if it wouldn't make
> sense to post a V2 with just the G1 and G2 decoders enabled.

Let's do that
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 34c2c80c47eb5..5040b3a545c32 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1639,6 +1639,39 @@  gpu2d: gpu@38008000 {
 			power-domains = <&pgc_gpu2d>;
 		};
 
+		vpu_g1: video-codec@38300000 {
+			compatible = "nxp,imx8mm-vpu-g1";
+			reg = <0x38300000 0x10000>;
+			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
+			assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
+			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+			assigned-clock-rates = <700000000>;
+			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
+		};
+
+		vpu_g2: video-codec@38310000 {
+			compatible = "nxp,imx8mq-vpu-g2";
+			reg = <0x38310000 0x10000>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
+			assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
+			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+			assigned-clock-rates = <700000000>;
+			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
+		};
+
+		vpu_vc8000e: vpu_vc8000e@38320000 {
+			compatible = "nxp,imx8mp-vpu-vc8000e";
+			reg = <0x38320000 0x10000>;
+			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
+			assigned-clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
+			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+			assigned-clock-rates = <700000000>;
+			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_VC8000E>;
+		};
+
 		vpumix_blk_ctrl: blk-ctrl@38330000 {
 			compatible = "fsl,imx8mp-vpu-blk-ctrl", "syscon";
 			reg = <0x38330000 0x100>;
@@ -1650,6 +1683,9 @@  vpumix_blk_ctrl: blk-ctrl@38330000 {
 				 <&clk IMX8MP_CLK_VPU_G2_ROOT>,
 				 <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
 			clock-names = "g1", "g2", "vc8000e";
+			assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>;
+			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+			assigned-clock-rates = <700000000>;
 			interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>,
 					<&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,
 					<&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>;