From patchwork Tue Dec 27 12:09:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 13082247 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBDD5C4332F for ; Tue, 27 Dec 2022 12:14:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Yzf44lKCz5qFJTYm/cCHXB/JlcmtDlK6eYjQJN1jslU=; b=Z8lFRfk52W4Gls bvcrxRiBObVO8MuGanra//oxuiunTcqJGhukuMb8GuxOHB3fvO5+wOW2Deej7BXJyhHW3SblmvuMw MJCX0Z+GoLmX4Om7LOxKp24csfPBT26bKtdzu2AtxQjHB50g406QufjGNVjxy3zIf4i/zD4TAt9z3 nwEdCtHAyeTYEMoB2dKMtxn3wUzqkkGtucnDxU9Ig9HJEMhEkVz4QogCp2CiDgZCRNHhFmXVTMCYY JRmVBIjD4BV/ONbyUGJjhSgQrlLMlZh80k2YkPaX2my2O1rNlNxBdU6tMXw0S7MkIW7AlQJCyackp BPP78huE+tePgTYMNYjQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pA8pt-00CkVX-Bg; Tue, 27 Dec 2022 12:13:38 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pA8nK-00CjHd-Oa; Tue, 27 Dec 2022 12:11:11 +0000 X-UUID: 7ca670da3aad46a089118fd66aa9669f-20221227 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=WxT5k8POG99uToD2cJBhvJc3TJPTxFQaT0XXuQBmPRY=; b=F04jzdTJlHWPPi4Ue5a5axXn6E6OOyWDwfFv8z8F8WNTLtPFUYgapXA2CzhwwJXl89DM2Kf36stZJEjnvZmInAZTWyYQtSP6cyt/i/uEwuZig6KUlEd4cLUyI/gxz0SLu1PtjtfiLf7mkB0Kp6ZVY4e12GPP+G2N6O9R4H/OSOQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14,REQID:8ed52295-a93a-48a3-b287-daf4389ad063,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:dcaaed0,CLOUDID:ac99898a-8530-4eff-9f77-222cf6e2895b,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 7ca670da3aad46a089118fd66aa9669f-20221227 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1086992882; Tue, 27 Dec 2022 05:10:52 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Dec 2022 20:09:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Dec 2022 20:09:18 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Nicolas Boichat CC: Fan Chen , Roger Lu , Jia-wei Chang , , , , , , Subject: [PATCH v2 09/13] soc: mediatek: mtk-svs: use svs clk control APIs Date: Tue, 27 Dec 2022 20:09:10 +0800 Message-ID: <20221227120914.11346-10-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221227120914.11346-1-roger.lu@mediatek.com> References: <20221227120914.11346-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221227_041058_926445_529C6D6C X-CRM114-Status: GOOD ( 17.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In MediaTek HW design, svs and thermal both use the same clk source. It means that svs clk reference count from CCF includes thermal control counts. That makes svs driver confuse whether it disabled svs's main clk or not from CCF's perspective and lead to turn off their shared clk unexpectedly. Therefore, we add svs clk control APIs to make sure svs's main clk is controlled well by svs driver itself. Here is a NG example. Rely on CCF's reference count and cause problem. thermal probe (clk ref = 1) -> svs probe (clk ref = 2) -> svs suspend (clk ref = 1) -> thermal suspend (clk ref = 0) -> thermal resume (clk ref = 1) -> svs resume (encounter error, clk ref = 1) -> svs suspend (clk ref = 0) -> thermal suspend (Fail here, thermal HW control w/o clk) Signed-off-by: Roger Lu --- drivers/soc/mediatek/mtk-svs.c | 54 +++++++++++++++++++++++++++------- 1 file changed, 43 insertions(+), 11 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 70f87715a084..ee663cfd4483 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -323,6 +324,7 @@ static const u32 svs_regs_v2[] = { * @bank_max: total number of svs banks * @efuse: svs efuse data received from NVMEM framework * @tefuse: thermal efuse data received from NVMEM framework + * @clk_cnt: clock count shows the clk enable/disable times by svs driver */ struct svs_platform { void __iomem *base; @@ -337,6 +339,7 @@ struct svs_platform { u32 bank_max; u32 *efuse; u32 *tefuse; + s32 clk_cnt; }; struct svs_platform_data { @@ -496,6 +499,32 @@ static void svs_switch_bank(struct svs_platform *svsp) svs_writel_relaxed(svsp, svsb->core_sel, CORESEL); } +static bool svs_is_clk_enabled(struct svs_platform *svsp) +{ + return svsp->clk_cnt > 0 ? true : false; +} + +static int svs_clk_enable(struct svs_platform *svsp) +{ + int ret; + + ret = clk_prepare_enable(svsp->main_clk); + if (ret) { + dev_err(svsp->dev, "cannot enable main_clk: %d\n", ret); + return ret; + } + + svsp->clk_cnt++; + + return 0; +} + +static void svs_clk_disable(struct svs_platform *svsp) +{ + clk_disable_unprepare(svsp->main_clk); + svsp->clk_cnt--; +} + static u32 svs_bank_volt_to_opp_volt(u32 svsb_volt, u32 svsb_volt_step, u32 svsb_volt_base) { @@ -1543,6 +1572,12 @@ static int svs_suspend(struct device *dev) int ret; u32 idx; + if (!svs_is_clk_enabled(svsp)) { + dev_err(svsp->dev, "svs clk is disabled already (%d)\n", + svsp->clk_cnt); + return 0; + } + for (idx = 0; idx < svsp->bank_max; idx++) { svsb = &svsp->banks[idx]; @@ -1564,7 +1599,7 @@ static int svs_suspend(struct device *dev) return ret; } - clk_disable_unprepare(svsp->main_clk); + svs_clk_disable(svsp); return 0; } @@ -1574,11 +1609,9 @@ static int svs_resume(struct device *dev) struct svs_platform *svsp = dev_get_drvdata(dev); int ret; - ret = clk_prepare_enable(svsp->main_clk); - if (ret) { - dev_err(svsp->dev, "cannot enable main_clk, disable svs\n"); + ret = svs_clk_enable(svsp); + if (ret) return ret; - } ret = reset_control_deassert(svsp->rst); if (ret) { @@ -1595,7 +1628,8 @@ static int svs_resume(struct device *dev) return 0; out_of_resume: - clk_disable_unprepare(svsp->main_clk); + svs_clk_disable(svsp); + return ret; } @@ -2340,11 +2374,9 @@ static int svs_probe(struct platform_device *pdev) goto svs_probe_free_tefuse; } - ret = clk_prepare_enable(svsp->main_clk); - if (ret) { - dev_err(svsp->dev, "cannot enable main clk: %d\n", ret); + ret = svs_clk_enable(svsp); + if (ret) goto svs_probe_free_tefuse; - } svsp->base = of_iomap(svsp->dev->of_node, 0); if (IS_ERR_OR_NULL(svsp->base)) { @@ -2385,7 +2417,7 @@ static int svs_probe(struct platform_device *pdev) iounmap(svsp->base); svs_probe_clk_disable: - clk_disable_unprepare(svsp->main_clk); + svs_clk_disable(svsp); svs_probe_free_tefuse: if (!IS_ERR_OR_NULL(svsp->tefuse))