From patchwork Wed Jan 11 11:44:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13096520 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D84EBC46467 for ; Wed, 11 Jan 2023 11:46:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jv9rRg7+4lWvTeeYUWHHOh4g/aQN7lWQf11ZCT51uoU=; b=HAYp8UHBNLFaVw hIuDc9B9uAjEmouQd+3+xBZ357u3abkaTa90XabFm2XLVvHpfu/eI9ITxH+tkHXmyljjzClBAJ65i NSb8Ws7LTWZx11NTOS8qN6LuFilEBGPGCsHZwQ5gqFPrPRBfJtcxN9/0G//q1QHJ+LPhaVgUUlEZ5 YLuGSC/TPsc73QtRdMbCO0DUkOriBhydPeXmXOgIeWmIfZOKUKLN6p2m/u/HrdB0l6NOuz40We5md Nuo4FbKIl5kT5mmgxNsXGjE9SXAYMuKElb2vO8JEl76h4f7h1oHGkTJa37ItBRbND5kCY+GQ858MZ rM1SsXwvyDN6+CoBzjag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pFZXx-00B8Cf-OC; Wed, 11 Jan 2023 11:45:33 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pFZXW-00B832-Ef for linux-arm-kernel@lists.infradead.org; Wed, 11 Jan 2023 11:45:09 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 30BBj19h030754; Wed, 11 Jan 2023 05:45:01 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1673437501; bh=gsE4XZA6NpAH7Ib8hRW4+ivUA6rjtiQonN9LPKstIHs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=o6A4OWfA2BlLYuN78JCu1jXn99wM9zuxMvtfd9GFGv3jiRxQ4bAduHY1Ey5TJV+yL RMdIoyXRKM30JDwVRtJH422pHH3QtQ42CHGTXRX2OuYlRUH8c8Ge6WUGPkQ1zh1eM1 7OMQsxg0/llmwMwzW1kRm+zPadvsetyhxVlN9634= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 30BBj1xN079394 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 11 Jan 2023 05:45:01 -0600 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 11 Jan 2023 05:45:00 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 11 Jan 2023 05:45:00 -0600 Received: from uda0492258.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 30BBiUkM093892; Wed, 11 Jan 2023 05:44:56 -0600 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH net-next 5/5] arm64: dts: ti: k3-am625-sk: Add cpsw3g cpts PPS support Date: Wed, 11 Jan 2023 17:14:29 +0530 Message-ID: <20230111114429.1297557-6-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230111114429.1297557-1-s-vadapalli@ti.com> References: <20230111114429.1297557-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230111_034506_614503_9A180422 X-CRM114-Status: GOOD ( 15.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The CPTS driver is capable of configuring GENFy (Periodic Signal Generator Function) present in the CPTS module, to generate periodic output signals with a custom time period. In order to generate a PPS signal on the GENFy output, the device-tree property "ti,pps" has to be used. The "ti,pps" property is used to declare the mapping between the CPTS HWx_TS_PUSH (Hardware Timestamp trigger) input and the GENFy output that is configured to generate a PPS signal. The mapping is of the form: where the value x corresponds to HWx_TS_PUSH input (1-based indexing) and the value y corresponds to GENFy (0-based indexing). To verify that the signal is a PPS signal, the GENFy output signal is fed into the CPTS HWx_TS_PUSH input, which generates a timestamp event on the rising edge of the GENFy signal. The GENFy output signal can be routed to the HWx_TS_PUSH input by using the Time Sync Router. This is done by mentioning the mapping between the GENFy output and the HWx_TS_PUSH input within the "timesync_router" device-tree node. The Input Sources to the Time Sync Router are documented at: [1] The Output Destinations of the Time Sync Router are documented at: [2] The PPS signal can be verified using testptp and ppstest tools as follows: # ./testptp -d /dev/ptp0 -P 1 pps for system time request okay # ./ppstest /dev/pps0 trying PPS source "/dev/pps0" found PPS source "/dev/pps0" ok, found 1 source(s), now start fetching data... source 0 - assert 48.000000013, sequence: 8 - clear 0.000000000, sequence: 0 source 0 - assert 49.000000013, sequence: 9 - clear 0.000000000, sequence: 0 source 0 - assert 50.000000013, sequence: 10 - clear 0.000000000, sequence: 0 Add an example in the device-tree, enabling PPS generation on GENF1. The HW3_TS_PUSH Timestamp trigger input is used to verify the PPS signal. [1] Link: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am62x/interrupt_cfg.html#timesync-event-router0-interrupt-router-input-sources [2] Link: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am62x/interrupt_cfg.html#timesync-event-router0-interrupt-router-output-destinations Signed-off-by: Siddharth Vadapalli --- arch/arm64/boot/dts/ti/k3-am625-sk.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts index 4f179b146cab..962a922cc94b 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts @@ -366,6 +366,10 @@ &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default &main_rgmii2_pins_default>; + + cpts@3d000 { + ti,pps = <2 1>; + }; }; &cpsw_port1 { @@ -464,3 +468,19 @@ partition@3fc0000 { }; }; }; + +#define TS_OFFSET(pa, val) (0x4+(pa)*4) (0x10000 | val) + +×ync_router { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cpsw_cpts>; + + /* Example of the timesync routing */ + cpsw_cpts: cpsw-cpts { + pinctrl-single,pins = < + /* pps [cpsw cpts genf1] in17 -> out12 [cpsw cpts hw3_push] */ + TS_OFFSET(12, 17) + >; + }; +};