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Thu, 12 Jan 2023 01:15:47 -0600 From: Mubin Sayyed To: , , , , , CC: , , , , , Mubin Sayyed Subject: [LINUX PATCH 2/3] dt-bindings: timer: Update device tree bindings for cadence TTC PWM Date: Thu, 12 Jan 2023 12:45:25 +0530 Message-ID: <20230112071526.3035949-3-mubin.sayyed@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230112071526.3035949-1-mubin.sayyed@amd.com> References: <20230112071526.3035949-1-mubin.sayyed@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT109:EE_|BY5PR12MB4967:EE_ X-MS-Office365-Filtering-Correlation-Id: fc96fe43-ad86-4f34-96a9-08daf46cd6bb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: yxOmxZE1sgRDqDxGaI34CWRslLE++TudD1J1fILQQHywkdcquZVsTiVELkaq7q/0bLmmsQ4ZWXsJHWCxIeR2tUl25jU/SFu1VErd3Q/0K1YoCMdRF8VXZFgtDgA1h2xARvtFpFuas0xdPwnM/KJmzw68nYK4jlKMCLxCUmQFCbFS1dQDXvL2oXUX1bYImig6U1kMPGmrulDJCrQicsf8vhj6ZcpuZJ0yjy0BLfaKdZ6+hncpe71yZg9+JErSmiFuz/1mchPRravXdyBHpQVXrJP8IwdKIjjXBqVioV/MjTtEX8i00KSCwYpEsRt6d8runOnXCMp0oGjZXIakvBmzhmFUo513aDIHW8wd3QQIWug3hLcs6SswnvEKcsRXD632dm7zxQPRRSAWOw/NhBSNIpTvD4Qe3GEAdmkG6pVOfdX5WSSVooDUXQgJ5mY3ExvY1RLYke2nzQyBrmXR0p0dWRpWUCnBlXJnLyPLzitsXXWgxX9kivG7ug15FUsa3DNnxLKnj+osY/Rw40o3wCDmOU7h4zjuBHvcxIdQzgoB94H+HLb+KdiKuJfzwpA7CXJqRqY4cw15XnXm3GsQ7cHIzFrt9sAXt0H5JuwN8RbB/ga+MJz/qXeE01iC1wfQH02VKKlEGIzh388dIB2/xTvIJ4wIusTdqWsHWdgrJ2HiPEeI5ZrYWDSL0EGKczSNtpJeZ68x45fLVKmttUGiM+qOkxD164So0eB7Mn6jRqsEiVM= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(346002)(136003)(39860400002)(396003)(451199015)(46966006)(36840700001)(40470700004)(82740400003)(478600001)(426003)(81166007)(356005)(47076005)(41300700001)(1076003)(40460700003)(86362001)(316002)(110136005)(54906003)(2616005)(70586007)(26005)(336012)(40480700001)(186003)(82310400005)(4326008)(36756003)(70206006)(5660300002)(15650500001)(36860700001)(2906002)(6666004)(44832011)(8676002)(8936002)(83380400001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jan 2023 07:15:52.2141 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fc96fe43-ad86-4f34-96a9-08daf46cd6bb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT109.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4967 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230111_231601_136372_1F139E42 X-CRM114-Status: GOOD ( 11.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Cadence TTC can act as PWM device, it is supported through separate PWM framework based driver. Decision to configure specific TTC device as PWM or clocksource/clockevent would be done based on presence of "#pwm-cells" property. Also, interrupt property is not required for TTC PWM driver. Updated bindings to support TTC PWM configuration. Signed-off-by: Mubin Sayyed --- .../devicetree/bindings/timer/cdns,ttc.yaml | 25 ++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/cdns,ttc.yaml b/Documentation/devicetree/bindings/timer/cdns,ttc.yaml index 7d821fd480f6..2855e92e02e3 100644 --- a/Documentation/devicetree/bindings/timer/cdns,ttc.yaml +++ b/Documentation/devicetree/bindings/timer/cdns,ttc.yaml @@ -32,12 +32,26 @@ properties: description: | Bit width of the timer, necessary if not 16. + "#pwm-cells": + description: | + Required to configure TTC as PWM device, supported cells are 0 to 3. + minimum: 0 + maximum: 3 + required: - compatible - reg - - interrupts - clocks +allOf: + - if: + not: + required: + - "#pwm-cells" + then: + required: + - interrupts + additionalProperties: false examples: @@ -50,3 +64,12 @@ examples: clocks = <&cpu_clk 3>; timer-width = <32>; }; + + - | + ttc1: ttc1@f8002000 { + compatible = "cdns,ttc"; + reg = <0xF8002000 0x1000>; + clocks = <&cpu_clk 3>; + timer-width = <32>; + #pwm-cells = <3>; + };