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[5.69.146.176]) by smtp.gmail.com with ESMTPSA id m15-20020a056000024f00b002bfae16ee2fsm17972811wrz.111.2023.02.01.04.59.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Feb 2023 04:59:38 -0800 (PST) From: Jean-Philippe Brucker To: maz@kernel.org, catalin.marinas@arm.com, will@kernel.org, joro@8bytes.org Cc: robin.murphy@arm.com, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, smostafa@google.com, dbrazdil@google.com, ryan.roberts@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, iommu@lists.linux.dev, Jean-Philippe Brucker Subject: [RFC PATCH 25/45] KVM: arm64: smmu-v3: Reset the device Date: Wed, 1 Feb 2023 12:53:09 +0000 Message-Id: <20230201125328.2186498-26-jean-philippe@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230201125328.2186498-1-jean-philippe@linaro.org> References: <20230201125328.2186498-1-jean-philippe@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230201_125906_506384_6042209F X-CRM114-Status: GOOD ( 13.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Now that all structures are initialized, send global invalidations and reset the SMMUv3 device. Signed-off-by: Jean-Philippe Brucker --- arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c | 36 ++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c b/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c index 021bebebd40c..81040339ccfe 100644 --- a/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c +++ b/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c @@ -348,6 +348,40 @@ static int smmu_init_strtab(struct hyp_arm_smmu_v3_device *smmu) return 0; } +static int smmu_reset_device(struct hyp_arm_smmu_v3_device *smmu) +{ + int ret; + struct arm_smmu_cmdq_ent cfgi_cmd = { + .opcode = CMDQ_OP_CFGI_ALL, + }; + struct arm_smmu_cmdq_ent tlbi_cmd = { + .opcode = CMDQ_OP_TLBI_NSNH_ALL, + }; + + /* Invalidate all cached configs and TLBs */ + ret = smmu_write_cr0(smmu, CR0_CMDQEN); + if (ret) + return ret; + + ret = smmu_add_cmd(smmu, &cfgi_cmd); + if (ret) + goto err_disable_cmdq; + + ret = smmu_add_cmd(smmu, &tlbi_cmd); + if (ret) + goto err_disable_cmdq; + + ret = smmu_sync_cmd(smmu); + if (ret) + goto err_disable_cmdq; + + /* Enable translation */ + return smmu_write_cr0(smmu, CR0_SMMUEN | CR0_CMDQEN | CR0_ATSCHK); + +err_disable_cmdq: + return smmu_write_cr0(smmu, 0); +} + static int smmu_init_device(struct hyp_arm_smmu_v3_device *smmu) { int ret; @@ -372,7 +406,7 @@ static int smmu_init_device(struct hyp_arm_smmu_v3_device *smmu) if (ret) return ret; - return 0; + return smmu_reset_device(smmu); } static int smmu_init(void)