From patchwork Thu Feb 2 15:32:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 13126425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EB76AC61DA4 for ; Thu, 2 Feb 2023 15:41:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RxIAnTKvAIIybaazJkm9a1CtN8gKOnAln5t/X2w/bd8=; b=ZZHdSQsQXgFPor nAxv8AaJmv+3fcXiokwdNHHJrkYbwHitmGGNc1cvkmZj7ebCMdRYr5vv3/YHrI8JV01Q4J2TGM7+z HU3Ih2kWlbgps2Wu4umXE1TZ6SfVp3HQbOpq1UbvyYriL92zKJlr8aAzZUAsngE4xoi/CUwAdlyGD UQK/9y8DZ2xUIcxKPL8HW1bM8CxCG5Lg4LewdXoU/EObVBDBaA/sS94QIyfO/u14wD1iRwTAQrWCl hpscz9UN83QbW9CINOcx2/zqv1od55KRnY8jORwO+l3fSX998IfiQheLM2EsnxWFZoQ2dLR+XVPAU S1ZGyWFyfBUm5Hn5UEOQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pNbh2-00GTQq-PP; Thu, 02 Feb 2023 15:40:09 +0000 Received: from mout.perfora.net ([74.208.4.197]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pNbab-00GQ43-W1 for linux-arm-kernel@lists.infradead.org; Thu, 02 Feb 2023 15:33:38 +0000 Received: from toolbox.int.toradex.com ([213.55.225.17]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MN27i-1pGzsE15Oy-006e4V; Thu, 02 Feb 2023 16:33:19 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-imx@nxp.com, Marcel Ziswiler , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v6 09/10] arm64: dts: freescale: add initial apalis imx8 aka quadmax module support Date: Thu, 2 Feb 2023 16:32:19 +0100 Message-Id: <20230202153221.197308-10-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230202153221.197308-1-marcel@ziswiler.com> References: <20230202153221.197308-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:bpku/ZT9BXmY7jzaVjBfDS5/Udb3UQwCvZadcIN6y5ThdcRoybZ zD2DGTYACeYRmoX1pgsbZsu0w73VUsKgz40kwdvjEMjgCznUfydNB3kUFND1vqd6CmifZev nCbI84otFotBShwnPA/5dMHVkT7iZssMMzP50IqXZG1dCNZ1RE+r38pd7TsHxV+NYVw3Auy MIw8Obz/N7oCtGxHiZlyg== UI-OutboundReport: notjunk:1;M01:P0:tlajm0HAJ1k=;NtOFQIc8YsJ9DgBCnMFx8++5CfE XK9TtSMnsGRsrenQfba4WoPjpgF1iadE95sNFnniYr0nxfCSvLQnzpd9jC8oKx25bf44X5QFn AdGRWgZ6Im9TTxImYLQx6peXCeTGyUM5FWgXqnPCaz4foyR2oab/sHQLkBe53MCV54vX8g9qI ptIuMS44SaS9NwX99ULNUKDQOLlbRsg4uLL2ZYPYmbKHqByJHHwOyAgcrd+Q1UfHg3pzt9X86 NMUMqqQyKJOc8SSSNn3VG6FfsucaaHM8NHGvp43o/SAMsmYEqb1LrZt1g39C2QFjTs6sOQLon W2aAks+L1gDagq3Unb7XVnY6cIJ89bHV+vXjqY4gArROcgJLnrY7ZHDRvkokv4F0oPircxbSv 4vcuUTHtd0owcC2psoOVP+Q8I19PRblYDZGvfA0lB7Mr0zj1hV3ocwciJgnLrfha6iKgZ38GN DlAa84xHTgce3Lq6dB0C/GrQLuvxb1M3vkGgQ2+wxI5c0p2NEo92qL3+n5VQAVZnx/FaHh9x+ 2BIioWsqTbJjsTuxgZztLT1NK00+xE/eDkfc0DOY6tjwgs6qJ6t/eTLiNuGpj9DoHPvsytYPg Y7m+aKHYwsM+L9JT6PPd8slt3yicsZOXcSvpsi3xuGyLqCaJ8DMFLT54q7M2JSras4NzqXyZM oVE7U87T1tUBHUJV7S33Ghk6tVuNC7S879z3D+VlLw== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230202_073330_270352_5B5D01E8 X-CRM114-Status: GOOD ( 19.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Marcel Ziswiler This patch adds the device tree to support Toradex Apalis iMX8 [1] aka QuadMax a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The carrier board device trees in the next patch will include the module's device tree and enable the supported peripherals of the carrier board. Some level of display functionality just landed upstream but requires further integration/testing on our side. Therefore, currently only basic console UART, eMMC and Ethernet functionality work fine. As there is no i.MX 8QuadPlus device tree upstream those have been dropped. However, apart from an error message during boot about it failing to bring up the second Cortex-A72 core this boots fine on QuadPlus' as well. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8 Signed-off-by: Marcel Ziswiler --- Changes in v6: - Incorporate Shawn's review feedback. Thanks! .../boot/dts/freescale/imx8-apalis-v1.1.dtsi | 1484 +++++++++++++++++ .../dts/freescale/imx8qm-apalis-v1.1.dtsi | 16 + .../boot/dts/freescale/imx8qm-apalis.dtsi | 340 ++++ 3 files changed, 1840 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi new file mode 100644 index 000000000000..4bd6f908fd2f --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi @@ -0,0 +1,1484 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include + +/ { + chosen { + stdout-path = &lpuart1; + }; + + /* Apalis BKL1 */ + backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + enable-gpios = <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_bkl_on>; + /* TODO: hook-up to Apalis BKL1_PWM */ + status = "disabled"; + }; + + gpio_fan: gpio-fan { + compatible = "gpio-fan"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio8>; + gpios = <&lsio_gpio3 28 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 3000 1>; + }; + +/* TODO: LVDS Panel */ + +/* TODO: Shared PCIe/SATA Reference Clock */ + +/* TODO: PCIe Wi-Fi Reference Clock */ + + /* + * Power management bus used to control LDO1OUT of the + * second PMIC PF8100. This is used for controlling voltage levels of + * typespecific RGMII signals and Apalis UART2_RTS UART2_CTS. + * + * IMX_SC_R_BOARD_R1 for 3.3V + * IMX_SC_R_BOARD_R2 for 1.8V + * IMX_SC_R_BOARD_R3 for 2.5V + * Note that for 2.5V operation the pad muxing needs to be changed, + * compare with PSW_OVR field of IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD. + * + * those power domains are mutually exclusive. + */ + reg_ext_rgmii: regulator-ext-rgmii { + compatible = "regulator-fixed"; + regulator-name = "VDD_EXT_RGMII (LDO1)"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + power-domains = <&pd IMX_SC_R_BOARD_R1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + reg_module_3v3: regulator-module-3v3 { + compatible = "regulator-fixed"; + regulator-name = "+V3.3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_module_3v3_avdd: regulator-module-3v3-avdd { + compatible = "regulator-fixed"; + regulator-name = "+V3.3_AUDIO"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_module_wifi: regulator-module-wifi { + compatible = "regulator-fixed"; + gpio = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wifi_pdn>; + regulator-name = "wifi_pwrdn_fake_regulator"; + regulator-settling-time-us = <100>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + reg_pcie_switch: regulator-pcie-switch { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio7>; + gpio = <&lsio_gpio3 26 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "pcie_switch"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + startup-delay-us = <100000>; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh_en>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + /* Apalis USBH_EN */ + gpio = <&lsio_gpio4 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + reg_usb_hsic: regulator-usb-hsic { + compatible = "regulator-fixed"; + regulator-name = "usb-hsic-dummy"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + reg_usb_phy: regulator-usb-hsic1 { + compatible = "regulator-fixed"; + regulator-name = "usb-phy-dummy"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + decoder_boot: decoder-boot@84000000 { + no-map; + reg = <0 0x84000000 0 0x2000000>; + }; + + encoder1_boot: encoder1-boot@86000000 { + no-map; + reg = <0 0x86000000 0 0x200000>; + }; + + encoder2_boot: encoder2-boot@86200000 { + no-map; + reg = <0 0x86200000 0 0x200000>; + }; + + /* + * reserved-memory layout + * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4 + * Shouldn't be used at A core and Linux side. + * + */ + m4_reserved: m4@88000000 { + no-map; + reg = <0 0x88000000 0 0x8000000>; + }; + + rpmsg_reserved: rpmsg@90200000 { + no-map; + reg = <0 0x90200000 0 0x200000>; + }; + + vdevbuffer: vdevbuffer@90400000 { + compatible = "shared-dma-pool"; + reg = <0 0x90400000 0 0x100000>; + no-map; + }; + + decoder_rpc: decoder-rpc@92000000 { + no-map; + reg = <0 0x92000000 0 0x200000>; + }; + + dsp_reserved: dsp@92400000 { + no-map; + reg = <0 0x92400000 0 0x2000000>; + }; + + encoder1_rpc: encoder1-rpc@94400000 { + no-map; + reg = <0 0x94400000 0 0x700000>; + }; + + encoder2_rpc: encoder2-rpc@94b00000 { + no-map; + reg = <0 0x94b00000 0 0x700000>; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0 0x3c000000>; + alloc-ranges = <0 0xc0000000 0 0x3c000000>; + linux,cma-default; + }; + }; + + /* TODO: Apalis Analogue Audio */ + + /* TODO: HDMI Audio */ + + /* TODO: Apalis SPDIF1 */ + + touchscreen: touchscreen { + compatible = "toradex,vf50-touchscreen"; + io-channels = <&adc1 2>, <&adc1 1>, + <&adc1 0>, <&adc1 3>; + interrupt-parent = <&lsio_gpio3>; + interrupts = <22 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "idle", "default"; + pinctrl-0 = <&pinctrl_touchctrl_idle>, <&pinctrl_touchctrl_gpios>; + pinctrl-1 = <&pinctrl_adc1>, <&pinctrl_touchctrl_gpios>; + vf50-ts-min-pressure = <200>; + xp-gpios = <&lsio_gpio2 4 GPIO_ACTIVE_LOW>; + xm-gpios = <&lsio_gpio2 5 GPIO_ACTIVE_HIGH>; + yp-gpios = <&lsio_gpio2 17 GPIO_ACTIVE_LOW>; + ym-gpios = <&lsio_gpio2 21 GPIO_ACTIVE_HIGH>; + /* + * NOTE: you must remove the pinctrl-adc1 from the adc1 + * node below to use the touchscreen + */ + status = "disabled"; + }; + +}; + +&adc0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc0>; +}; + +&adc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc1>; +}; + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* Apalis ETH1 */ +&fec1 { + fsl,magic-packet; + phy-handle = <ðphy0>; + phy-mode = "rgmii-id"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_fec1>; + pinctrl-1 = <&pinctrl_fec1_sleep>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <7>; + interrupt-parent = <&lsio_gpio1>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <0>; + reset-assert-us = <2>; + reset-deassert-us = <2>; + reset-gpios = <&lsio_gpio1 11 GPIO_ACTIVE_LOW>; + reset-names = "phy-reset"; + }; + }; +}; + +/* Apalis CAN1 */ +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; +}; + +/* Apalis CAN2 */ +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; +}; + +/* Apalis CAN3 (optional) */ +&flexcan3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan3>; +}; + +/* TODO: Apalis HDMI1 */ + +/* On-module I2C */ +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c1>; + status = "okay"; + + /* TODO: Audio Codec */ + + /* USB3503A */ + usb-hub@8 { + compatible = "smsc,usb3503a"; + reg = <0x08>; + connect-gpios = <&lsio_gpio0 31 GPIO_ACTIVE_LOW>; + initial-mode = <1>; + intn-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb3503a>; + refclk-frequency = <25000000>; + reset-gpios = <&lsio_gpio1 2 GPIO_ACTIVE_LOW>; + }; +}; + +/* Apalis I2C1 */ +&i2c2 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c2>; + + atmel_mxt_ts: touch@4a { + compatible = "atmel,maxtouch"; + reg = <0x4a>; + interrupt-parent = <&lsio_gpio4>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>; + reset-gpios = <&lsio_gpio4 2 GPIO_ACTIVE_LOW>; /* Apalis GPIO6 */ + status = "disabled"; + }; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + status = "disabled"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c3>; +}; + +&jpegdec { + status = "okay"; +}; + +&jpegenc { + status = "okay"; +}; + +/* TODO: Apalis LVDS1 */ + +/* Apalis SPI1 */ +&lpspi0 { + #address-cells = <1>; + #size-cells = <0>; + cs-gpios = <&lsio_gpio3 5 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpspi0>; +}; + +/* Apalis SPI2 */ +&lpspi2 { + #address-cells = <1>; + #size-cells = <0>; + cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpspi2>; +}; + +/* Apalis UART3 */ +&lpuart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart0>; +}; + +/* Apalis UART1 */ +&lpuart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart1>; +}; + +/* Apalis UART4 */ +&lpuart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart2>; +}; + +/* Apalis UART2 */ +&lpuart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart3>; +}; + +&lsio_gpio0 { + gpio-line-names = "MXM3_279", + "MXM3_277", + "MXM3_135", + "MXM3_203", + "MXM3_201", + "MXM3_275", + "MXM3_110", + "MXM3_120", + "MXM3_1/GPIO1", + "MXM3_3/GPIO2", + "MXM3_124", + "MXM3_122", + "MXM3_5/GPIO3", + "MXM3_7/GPIO4", + "", + "", + "MXM3_4", + "MXM3_211", + "MXM3_209", + "MXM3_2", + "MXM3_136", + "MXM3_134", + "MXM3_6", + "MXM3_8", + "MXM3_112", + "MXM3_118", + "MXM3_114", + "MXM3_116"; +}; + +&lsio_gpio1 { + gpio-line-names = "", + "", + "", + "", + "MXM3_286", + "", + "MXM3_87", + "MXM3_99", + "MXM3_138", + "MXM3_140", + "MXM3_239", + "", + "MXM3_281", + "MXM3_283", + "MXM3_126", + "MXM3_132", + "", + "", + "", + "", + "MXM3_173", + "MXM3_175", + "MXM3_123"; + + hdmi-ctrl-hog { + gpio-hog; + gpios = <30 GPIO_ACTIVE_HIGH>; + line-name = "CONNECTOR_IS_HDMI"; + /* Set signals depending on HDP device type, 0 DP, 1 HDMI */ + output-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi_ctrl>; + }; +}; + +&lsio_gpio2 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "MXM3_198", + "MXM3_35", + "MXM3_164", + "", + "", + "", + "", + "MXM3_217", + "MXM3_215", + "", + "", + "MXM3_193", + "MXM3_194", + "MXM3_37", + "", + "MXM3_271", + "MXM3_273", + "MXM3_195", + "MXM3_197", + "MXM3_177", + "MXM3_179", + "MXM3_181", + "MXM3_183", + "MXM3_185", + "MXM3_187"; + + /* + * Add GPIO2_20 as a wakeup source: + * Pin: 101 SC_P_SPI3_CS0 (MXM3_37/WAKE1_MICO) + * Type: 5 SC_PAD_WAKEUP_FALL_EDGE + * Line: 20 + */ + pad-wakeup = ; + pad-wakeup-num = <1>; + + pcie-wifi-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + line-name = "PCIE_WIFI_CLK"; + output-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie_wifi_refclk>; + }; +}; + +&lsio_gpio3 { + gpio-line-names = "MXM3_191", + "", + "MXM3_221", + "MXM3_225", + "MXM3_223", + "MXM3_227", + "MXM3_200", + "MXM3_235", + "MXM3_231", + "MXM3_229", + "MXM3_233", + "MXM3_204", + "MXM3_196", + "", + "MXM3_202", + "", + "", + "", + "MXM3_305", + "MXM3_307", + "MXM3_309", + "MXM3_311", + "MXM3_315", + "MXM3_317", + "MXM3_319", + "MXM3_321", + "MXM3_15/GPIO7", + "MXM3_63", + "MXM3_17/GPIO8", + "MXM3_12", + "MXM3_14", + "MXM3_16"; +}; + +&lsio_gpio4 { + gpio-line-names = "MXM3_18", + "MXM3_11/GPIO5", + "MXM3_13/GPIO6", + "MXM3_274", + "MXM3_84", + "MXM3_262", + "MXM3_96", + "", + "", + "", + "", + "", + "MXM3_190", + "", + "", + "", + "MXM3_269", + "MXM3_251", + "MXM3_253", + "MXM3_295", + "MXM3_299", + "MXM3_301", + "MXM3_297", + "MXM3_293", + "MXM3_291", + "MXM3_289", + "MXM3_287"; + + /* Enable pcie root / sata ref clock unconditionally */ + pcie-sata-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + line-name = "PCIE_SATA_CLK"; + output-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie_sata_refclk>; + }; +}; + +&lsio_gpio5 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_150", + "MXM3_160", + "MXM3_162", + "MXM3_144", + "MXM3_146", + "MXM3_148", + "MXM3_152", + "MXM3_156", + "MXM3_158", + "MXM3_159", + "MXM3_184", + "MXM3_180", + "MXM3_186", + "MXM3_188", + "MXM3_176", + "MXM3_178"; +}; + +&lsio_gpio6 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_261", + "MXM3_263", + "MXM3_259", + "MXM3_257", + "MXM3_255", + "MXM3_128", + "MXM3_130", + "MXM3_265", + "MXM3_249", + "MXM3_247", + "MXM3_245", + "MXM3_243"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0>; + #pwm-cells = <3>; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + #pwm-cells = <3>; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + #pwm-cells = <3>; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + #pwm-cells = <3>; +}; + +/* Messaging Units */ +&mu_m0{ + status = "okay"; +}; + +&mu1_m0{ + status = "okay"; +}; + +&mu2_m0{ + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: On-module Wi-Fi */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Thermal Zones */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* TODO: Apalis USBH4 */ + +/* Apalis USBO1 */ +&usbphy1 { + phy-3p0-supply = <®_usb_phy>; + status = "okay"; +}; + +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1>; + adp-disable; + ci-disable-lpm; + hnp-disable; + over-current-active-low; + power-active-high; + srp-disable; +}; + +/* On-module eMMC */ +&usdhc1 { + bus-width = <8>; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + status = "okay"; +}; + +/* Apalis MMC1 */ +&usdhc2 { + bus-width = <8>; + cd-gpios = <&lsio_gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */ + no-1-8-v; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 = <&pinctrl_usdhc2_4bit>, + <&pinctrl_usdhc2_8bit>, + <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, + <&pinctrl_usdhc2_8bit_100mhz>, + <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, + <&pinctrl_usdhc2_8bit_200mhz>, + <&pinctrl_mmc1_cd>; + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, + <&pinctrl_usdhc2_8bit_sleep>, + <&pinctrl_mmc1_cd_sleep>; +}; + +/* Apalis SD1 */ +&usdhc3 { + bus-width = <4>; + cd-gpios = <&lsio_gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */ + no-1-8-v; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_sd1_cd>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>; +}; + +/* Video Processing Unit */ +&vpu { + compatible = "nxp,imx8qm-vpu"; + status = "okay"; +}; + +&vpu_core0 { + memory-region = <&decoder_boot>, <&decoder_rpc>; + reg = <0x2d080000 0x10000>; + status = "okay"; +}; + +&vpu_core1 { + memory-region = <&encoder1_boot>, <&encoder1_rpc>; + reg = <0x2d090000 0x10000>; + status = "okay"; +}; + +&vpu_core2 { + memory-region = <&encoder2_boot>, <&encoder2_rpc>; + reg = <0x2d0a0000 0x10000>; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_keys>, + <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, + <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, + <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, + <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, + <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, + <&pinctrl_usdhc1_gpios>; + + /* Apalis AN1_ADC */ + pinctrl_adc0: adc0grp { + fsl,pins = /* Apalis AN1_ADC0 */ + , + /* Apalis AN1_ADC1 */ + , + /* Apalis AN1_ADC2 */ + , + /* Apalis AN1_TSWIP_ADC3 */ + ; + }; + + /* Apalis AN1_TS */ + pinctrl_adc1: adc1grp { + fsl,pins = /* Apalis AN1_TSPX */ + , + /* Apalis AN1_TSMX */ + , + /* Apalis AN1_TSPY */ + , + /* Apalis AN1_TSMY */ + ; + }; + + /* Apalis CAM1 */ + pinctrl_cam1_gpios: cam1gpiosgrp { + fsl,pins = /* Apalis CAM1_D7 */ + , + /* Apalis CAM1_D6 */ + , + /* Apalis CAM1_D5 */ + , + /* Apalis CAM1_D4 */ + , + /* Apalis CAM1_D3 */ + , + /* Apalis CAM1_D2 */ + , + /* Apalis CAM1_D1 */ + , + /* Apalis CAM1_D0 */ + , + /* Apalis CAM1_PCLK */ + , + /* Apalis CAM1_MCLK */ + , + /* Apalis CAM1_VSYNC */ + , + /* Apalis CAM1_HSYNC */ + ; + }; + + /* Apalis DAP1 */ + pinctrl_dap1_gpios: dap1gpiosgrp { + fsl,pins = /* Apalis DAP1_MCLK */ + , + /* Apalis DAP1_D_OUT */ + , + /* Apalis DAP1_RESET */ + , + /* Apalis DAP1_BIT_CLK */ + , + /* Apalis DAP1_D_IN */ + , + /* Apalis DAP1_SYNC */ + , + /* On-module Wi-Fi_I2S_EN# */ + ; + }; + + /* Apalis LCD1_G1+2 */ + pinctrl_esai0_gpios: esai0gpiosgrp { + fsl,pins = /* Apalis LCD1_G1 */ + , + /* Apalis LCD1_G2 */ + ; + }; + + /* On-module Gigabit Ethernet PHY Micrel KSZ9031 for Apalis GLAN */ + pinctrl_fec1: fec1grp { + fsl,pins = /* Use pads in 3.3V mode */ + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + /* On-module ETH_RESET# */ + , + /* On-module ETH_INT# */ + ; + }; + + pinctrl_fec1_sleep: fec1-sleepgrp { + fsl,pins = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + /* Apalis LCD1_ */ + pinctrl_fec2_gpios: fec2gpiosgrp { + fsl,pins = , + /* Apalis LCD1_R1 */ + , + /* Apalis LCD1_R0 */ + , + /* Apalis LCD1_G0 */ + , + /* Apalis LCD1_R7 */ + , + /* Apalis LCD1_DE */ + , + /* Apalis LCD1_HSYNC */ + , + /* Apalis LCD1_VSYNC */ + , + /* Apalis LCD1_PCLK */ + , + /* Apalis LCD1_R6 */ + , + /* Apalis LCD1_R5 */ + , + /* Apalis LCD1_R4 */ + , + /* Apalis LCD1_R3 */ + , + /* Apalis LCD1_R2 */ + ; + }; + + /* Apalis CAN1 */ + pinctrl_flexcan1: flexcan0grp { + fsl,pins = , + ; + }; + + /* Apalis CAN2 */ + pinctrl_flexcan2: flexcan1grp { + fsl,pins = , + ; + }; + + /* Apalis CAN3 (optional) */ + pinctrl_flexcan3: flexcan2grp { + fsl,pins = , + ; + }; + + /* Apalis GPIO1 */ + pinctrl_gpio1: gpio1grp { + fsl,pins = ; + }; + + /* Apalis GPIO2 */ + pinctrl_gpio2: gpio2grp { + fsl,pins = ; + }; + + /* Apalis GPIO3 */ + pinctrl_gpio3: gpio3grp { + fsl,pins = ; + }; + + /* Apalis GPIO4 */ + pinctrl_gpio4: gpio4grp { + fsl,pins = ; + }; + + /* Apalis GPIO5 */ + pinctrl_gpio5: gpio5grp { + fsl,pins = ; + }; + + /* Apalis GPIO6 */ + pinctrl_gpio6: gpio6grp { + fsl,pins = ; + }; + + /* Apalis GPIO7 */ + pinctrl_gpio7: gpio7grp { + fsl,pins = ; + }; + + /* Apalis GPIO8 */ + pinctrl_gpio8: gpio8grp { + fsl,pins = ; + }; + + /* Apalis BKL1_ON */ + pinctrl_gpio_bkl_on: gpiobklongrp { + fsl,pins = ; + }; + + /* Apalis WAKE1_MICO */ + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = ; + }; + + /* Apalis USBH_OC# */ + pinctrl_gpio_usbh_oc_n: gpiousbhocngrp { + fsl,pins = ; + }; + + /* On-module HDMI_CTRL */ + pinctrl_hdmi_ctrl: hdmictrlgrp { + fsl,pins = ; + }; + + /* On-module I2C */ + pinctrl_lpi2c1: lpi2c1grp { + fsl,pins = , + ; + }; + + /* Apalis I2C1 */ + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins = , + ; + }; + + /* Apalis I2C3 (CAM) */ + pinctrl_lpi2c3: lpi2c3grp { + fsl,pins = , + ; + }; + + /* Apalis SPI1 */ + pinctrl_lpspi0: lpspi0grp { + fsl,pins = , + , + , + ; + }; + + /* Apalis SPI2 */ + pinctrl_lpspi2: lpspi2grp { + fsl,pins = , + , + , + ; + }; + + /* Apalis UART3 */ + pinctrl_lpuart0: lpuart0grp { + fsl,pins = , + ; + }; + + /* Apalis UART1 */ + pinctrl_lpuart1: lpuart1grp { + fsl,pins = , + , + , + ; + }; + + /* Apalis UART1 */ + pinctrl_lpuart1ctrl: lpuart1ctrlgrp { + fsl,pins = /* Apalis UART1_DTR */ + , + /* Apalis UART1_DSR */ + , + /* Apalis UART1_DCD */ + , + /* Apalis UART1_RI */ + ; + }; + + /* Apalis UART4 */ + pinctrl_lpuart2: lpuart2grp { + fsl,pins = , + ; + }; + + /* Apalis UART2 */ + pinctrl_lpuart3: lpuart3grp { + fsl,pins = , + , + , + ; + }; + + /* Apalis TS_2 */ + pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpiogrp { + fsl,pins = ; + }; + + /* Apalis LCD1_G6+7 */ + pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp { + fsl,pins = /* Apalis LCD1_G6 */ + , + /* Apalis LCD1_G7 */ + ; + }; + + /* Apalis TS_3 */ + pinctrl_mipi_dsi_0_1_en: mipidsi0-1engrp { + fsl,pins = ; + }; + + /* Apalis TS_4 */ + pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp { + fsl,pins = ; + }; + + /* Apalis TS_1 */ + pinctrl_mlb_gpios: mlbgpiosgrp { + fsl,pins = ; + }; + + /* Apalis MMC1_CD# */ + pinctrl_mmc1_cd: mmc1cdgrp { + fsl,pins = ; + }; + + pinctrl_mmc1_cd_sleep: mmc1cdsleepgrp { + fsl,pins = ; + }; + + /* On-module PCIe_Wi-Fi */ + pinctrl_pcieb: pciebgrp { + fsl,pins = , + , + ; + }; + + /* On-module PCIe_CLK_EN1 */ + pinctrl_pcie_sata_refclk: pciesatarefclkgrp { + fsl,pins = ; + }; + + /* On-module PCIe_CLK_EN2 */ + pinctrl_pcie_wifi_refclk: pciewifirefclkgrp { + fsl,pins = ; + }; + + /* Apalis PWM3 */ + pinctrl_pwm0: pwm0grp { + fsl,pins = ; + }; + + /* Apalis PWM4 */ + pinctrl_pwm1: pwm1grp { + fsl,pins = ; + }; + + /* Apalis PWM1 */ + pinctrl_pwm2: pwm2grp { + fsl,pins = ; + }; + + /* Apalis PWM2 */ + pinctrl_pwm3: pwm3grp { + fsl,pins = ; + }; + + /* Apalis BKL1_PWM */ + pinctrl_pwm_bkl: pwmbklgrp { + fsl,pins = ; + }; + + /* Apalis LCD1_ */ + pinctrl_qspi1a_gpios: qspi1agpiosgrp { + fsl,pins = /* Apalis LCD1_B0 */ + , + /* Apalis LCD1_B1 */ + , + /* Apalis LCD1_B2 */ + , + /* Apalis LCD1_B3 */ + , + /* Apalis LCD1_B5 */ + , + /* Apalis LCD1_B7 */ + , + /* Apalis LCD1_B4 */ + , + /* Apalis LCD1_B6 */ + ; + }; + + /* On-module RESET_MOCI#_DRV */ + pinctrl_reset_moci: resetmocigrp { + fsl,pins = ; + }; + + /* On-module I2S SGTL5000 for Apalis Analogue Audio */ + pinctrl_sai1: sai1grp { + fsl,pins = , + , + , + ; + }; + + /* Apalis SATA1_ACT# */ + pinctrl_sata1_act: sata1actgrp { + fsl,pins = ; + }; + + /* Apalis SD1_CD# */ + pinctrl_sd1_cd: sd1cdgrp { + fsl,pins = ; + }; + + /* On-module I2S SGTL5000 SYS_MCLK */ + pinctrl_sgtl5000: sgtl5000grp { + fsl,pins = ; + }; + + /* Apalis LCD1_ */ + pinctrl_sim0_gpios: sim0gpiosgrp { + fsl,pins = /* Apalis LCD1_G5 */ + , + /* Apalis LCD1_G3 */ + , + /* Apalis TS_5 */ + , + /* Apalis LCD1_G4 */ + ; + }; + + /* Apalis SPDIF */ + pinctrl_spdif0: spdif0grp { + fsl,pins = , + ; + }; + + pinctrl_touchctrl_gpios: touchctrlgpiosgrp { + fsl,pins = , + , + , + ; + }; + + pinctrl_touchctrl_idle: touchctrlidlegrp { + fsl,pins = , + , + , + ; + }; + + /* On-module USB HSIC HUB (active) */ + pinctrl_usb_hsic_active: usbh1activegrp { + fsl,pins = , + ; + }; + + /* On-module USB HSIC HUB (idle) */ + pinctrl_usb_hsic_idle: usbh1idlegrp { + fsl,pins = , + ; + }; + + /* On-module USB HSIC HUB */ + pinctrl_usb3503a: usb3503agrp { + fsl,pins = /* On-module HSIC_HUB_CONNECT */ + , + /* On-module HSIC_INT_N */ + , + /* On-module HSIC_RESET_N */ + ; + }; + + /* Apalis USBH_EN */ + pinctrl_usbh_en: usbhengrp { + fsl,pins = ; + }; + + /* Apalis USBO1 */ + pinctrl_usbotg1: usbotg1grp { + fsl,pins = /* Apalis USBO1_EN */ + , + /* Apalis USBO1_OC# */ + ; + }; + + /* On-module eMMC */ + pinctrl_usdhc1: usdhc1grp { + fsl,pins = , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins = , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins = , + , + , + , + , + , + , + , + , + , + , + ; + }; + + /* Apalis TS_6 */ + pinctrl_usdhc1_gpios: usdhc1gpiosgrp { + fsl,pins = ; + }; + + /* Apalis MMC1 */ + pinctrl_usdhc2_4bit: usdhc2grp4bitgrp { + fsl,pins = , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc2_4bit_100mhz: usdhc2-4bit100mhzgrp { + fsl,pins = , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc2_4bit_200mhz: usdhc2-4bit200mhzgrp { + fsl,pins = , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc2_8bit: usdhc2grp8bitgrp { + fsl,pins = , + , + , + ; + }; + + pinctrl_usdhc2_8bit_100mhz: usdhc2-8bit100mhzgrp { + fsl,pins = , + , + , + ; + }; + + pinctrl_usdhc2_8bit_200mhz: usdhc2-8bit200mhzgrp { + fsl,pins = , + , + , + ; + }; + + pinctrl_usdhc2_4bit_sleep: usdhc2-4bitsleepgrp { + fsl,pins = , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc2_8bit_sleep: usdhc2-8bitsleepgrp { + fsl,pins = , + , + , + ; + }; + + /* Apalis SD1 */ + pinctrl_usdhc3: usdhc3grp { + fsl,pins = , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins = , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins = , + , + , + , + , + , + /* On-module PMIC use */ + ; + }; + + /* On-module Wi-Fi */ + pinctrl_wifi: wifigrp { + fsl,pins = /* On-module Wi-Fi_SUSCLK_32k */ + , + /* On-module Wi-Fi_PCIE_W_DISABLE */ + ; + }; + + pinctrl_wifi_pdn: wifipdngrp { + fsl,pins = /* On-module Wi-Fi_POWER_DOWN */ + ; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi new file mode 100644 index 000000000000..81ba8b2831ac --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include +#include "imx8qm.dtsi" +#include "imx8-apalis-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1"; + compatible = "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; + +/* TODO: Cooling Maps */ diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi new file mode 100644 index 000000000000..1c6af9f549a8 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi @@ -0,0 +1,340 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include "imx8qm-apalis-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM"; + compatible = "toradex,apalis-imx8", + "fsl,imx8qm"; +}; + +ðphy0 { + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; +}; + +/* + * Apalis iMX8QM V1.0 has PHY KSZ9031. the Micrel PHY driver + * doesn't support setting internal PHY delay for TXC line for + * this PHY model. Use delay on MAC side instead. + */ +&fec1 { + fsl,rgmii_txc_dly; + phy-mode = "rgmii-rxid"; +}; + +/* TODO: Apalis HDMI1 */ + +/* Apalis I2C2 (DDC) */ +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c0>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; +}; + +&lsio_gpio0 { + gpio-line-names = "MXM3_279", + "MXM3_277", + "MXM3_135", + "MXM3_203", + "MXM3_201", + "MXM3_275", + "MXM3_110", + "MXM3_120", + "MXM3_1/GPIO1", + "MXM3_3/GPIO2", + "MXM3_124", + "MXM3_122", + "MXM3_5/GPIO3", + "MXM3_7/GPIO4", + "", + "", + "MXM3_4", + "MXM3_211", + "MXM3_209", + "MXM3_2", + "MXM3_136", + "MXM3_134", + "MXM3_6", + "MXM3_8", + "MXM3_112", + "MXM3_118", + "MXM3_114", + "MXM3_116"; +}; + +&lsio_gpio1 { + gpio-line-names = "", + "", + "", + "", + "MXM3_286", + "", + "MXM3_87", + "MXM3_99", + "MXM3_138", + "MXM3_140", + "MXM3_239", + "", + "MXM3_281", + "MXM3_283", + "MXM3_126", + "MXM3_132", + "", + "", + "", + "", + "MXM3_173", + "MXM3_175", + "MXM3_123"; +}; + +&lsio_gpio2 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "MXM3_198", + "MXM3_35", + "MXM3_164", + "", + "", + "", + "", + "MXM3_217", + "MXM3_215", + "", + "", + "MXM3_193", + "MXM3_194", + "MXM3_37", + "", + "MXM3_271", + "MXM3_273", + "MXM3_195", + "MXM3_197", + "MXM3_177", + "MXM3_179", + "MXM3_181", + "MXM3_183", + "MXM3_185", + "MXM3_187"; +}; + +&lsio_gpio3 { + gpio-line-names = "MXM3_191", + "", + "MXM3_221", + "MXM3_225", + "MXM3_223", + "MXM3_227", + "MXM3_200", + "MXM3_235", + "MXM3_231", + "MXM3_229", + "MXM3_233", + "MXM3_204", + "MXM3_196", + "", + "MXM3_202", + "", + "", + "", + "MXM3_305", + "MXM3_307", + "MXM3_309", + "MXM3_311", + "MXM3_315", + "MXM3_317", + "MXM3_319", + "MXM3_321", + "MXM3_15/GPIO7", + "MXM3_63", + "MXM3_17/GPIO8", + "MXM3_12", + "MXM3_14", + "MXM3_16"; +}; + +&lsio_gpio4 { + gpio-line-names = "MXM3_18", + "MXM3_11/GPIO5", + "MXM3_13/GPIO6", + "MXM3_274", + "MXM3_84", + "MXM3_262", + "MXM3_96", + "", + "", + "", + "", + "", + "MXM3_190", + "", + "", + "", + "MXM3_269", + "MXM3_251", + "MXM3_253", + "MXM3_295", + "MXM3_299", + "MXM3_301", + "MXM3_297", + "MXM3_293", + "MXM3_291", + "MXM3_289", + "MXM3_287"; + + /* Enable pcie root / sata ref clock unconditionally */ + pcie-sata-hog { + gpios = <27 GPIO_ACTIVE_HIGH>; + }; + +}; + +&lsio_gpio5 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_150", + "MXM3_160", + "MXM3_162", + "MXM3_144", + "MXM3_146", + "MXM3_148", + "MXM3_152", + "MXM3_156", + "MXM3_158", + "MXM3_159", + "MXM3_184", + "MXM3_180", + "MXM3_186", + "MXM3_188", + "MXM3_176", + "MXM3_178"; +}; + +&lsio_gpio6 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_261", + "MXM3_263", + "MXM3_259", + "MXM3_257", + "MXM3_255", + "MXM3_128", + "MXM3_130", + "MXM3_265", + "MXM3_249", + "MXM3_247", + "MXM3_245", + "MXM3_243"; +}; + +&pinctrl_fec1 { + fsl,pins = + /* Use pads in 1.8V mode */ + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + /* On-module ETH_RESET# */ + , + /* On-module ETH_INT# */ + ; +}; + +&pinctrl_fec1_sleep { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; +}; + +&iomuxc { + /* Apalis I2C2 (DDC) */ + pinctrl_lpi2c0: lpi2c0grp { + fsl,pins = + , + ; + }; +}; + +/* On-module PCIe_CTRL0_CLKREQ */ +&pinctrl_pcie_sata_refclk { + fsl,pins = + ; +}; + +/* TODO: On-module Wi-Fi */ + +/* Apalis MMC1 */ +&usdhc2 { + /* + * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates + * issues with certain SD cards, disable 1.8V signaling for now. + */ + no-1-8-v; +}; + +/* Apalis SD1 */ +&usdhc3 { + /* + * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates + * issues with certain SD cards, disable 1.8V signaling for now. + */ + no-1-8-v; +};