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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id hu21-20020a05600ca29500b003eaee9e0d22sm12986242wmb.33.2023.03.07.05.18.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Mar 2023 05:18:14 -0800 (PST) From: Alexandre Mergnat Date: Tue, 07 Mar 2023 14:17:42 +0100 Subject: [PATCH v2 13/18] arm64: dts: mediatek: add ethernet support for mt8365 SoC MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v2-13-6ec7cdb10ccf@baylibre.com> References: <20230203-evk-board-support-v2-0-6ec7cdb10ccf@baylibre.com> In-Reply-To: <20230203-evk-board-support-v2-0-6ec7cdb10ccf@baylibre.com> To: =?unknown-8bit?q?Zhiyong_Tao_=3Czhiyong=2Etao=40mediatek=2Ecom=3E=2C_Gue?= =?unknown-8bit?q?nter_Roeck_=3Clinux=40roeck-us=2Enet=3E=2C_Linus_Walleij_?= =?unknown-8bit?q?=3Clinus=2Ewalleij=40linaro=2Eorg=3E=2C?= =?unknown-8bit?q?_Bernhard_Rosenkr=C3=A4nzer_=3Cbero=40baylibre=2Ecom=3E=2C_?= =?unknown-8bit?q?AngeloGioacchino_Del_Regno_=3Cangelogioacchino=2Edelregno?= =?unknown-8bit?q?=40collabora=2Ecom=3E=2C?= =?unknown-8bit?q?_Ulf_Hansson_=3Culf=2Ehansson=40linaro=2Eorg=3E=2C_Wim_Van_?= =?unknown-8bit?q?Sebroeck_=3Cwim=40linux-watchdog=2Eorg=3E=2C?= =?unknown-8bit?q?_Krzysztof_Kozlowski_=3Ckrzysztof=2Ekozlowski+dt=40linaro?= =?unknown-8bit?q?=2Eorg=3E=2C_Chaotian_Jing_=3Cchaotian=2Ejing=40mediatek?= =?unknown-8bit?q?=2Ecom=3E=2C?= =?unknown-8bit?q?_Rob_Herring_=3Crobh+dt=40kernel=2Eorg=3E=2C_Wenbin_Mei_=3C?= =?unknown-8bit?q?wenbin=2Emei=40mediatek=2Ecom=3E=2C_Matthias_Brugger_=3Cma?= =?unknown-8bit?q?tthias=2Ebgg=40gmail=2Ecom=3E?= Cc: linux-mmc@vger.kernel.org, Alexandre Bailon , devicetree@vger.kernel.org, Amjad Ouled-Ameur , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org, Alexandre Mergnat , linux-mediatek@lists.infradead.org, Fabien Parent X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1366; i=amergnat@baylibre.com; h=from:subject:message-id; bh=7pGcYrXi2hCGwx6B3T21Sna5Awy1U2WZgVtirE5+dl8=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkBzmF1I9j0+IU2v2RxpbCwB2my0kNnwI44xhyeFNR uO6Rj5SJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZAc5hQAKCRArRkmdfjHUReT/D/ 9f/Z0AlnwLWfgxZfW4BDsRbISoCY87TTG4ZwHBUYDz6dJ+Q5sFIOxtg1DSXFWtYQYLS8+OTyZjJo/k Kv7O1Q8tD+UZ9YtLtpVxaH8WPckQSURjbCj2RG6qfSjQ5HOqmIlqwKIA3f5My78bfgDL91c13lgqp2 7kOqOYp+B6goWCpZie3cYo3x4YJX2CCxP8dRWUHtjNh8xjzene2wm9aE1AiueQImqOKM5JdzDgJB/F WgG98pjdtUwuMQwgIgusg0tqmRpcVPBV/ksXv5jfkCz5ie3vAdN+r0iW2nYl2XnWca+9+PybQ1Kiav iPC5W7rHj/9g4+hXLCUr2ps6H0mkKibdairpalxKAl52SpL/h+LvgcdNqglIo8LkhSapfD39LmbQvb +Gr1ZIyVtvgrwlw0TH0MJ9W/SRo4K0wS4AgGKEcYxKDIXVLoGyQNVfYli08WFbsAx2cFCz0ekHWhxf XjmHYQFB3V92oJ5wsconzyqMsdtnu6ZLfCqpeqYfApfDHBJD21z/WmuAHS8X1kvHWux4qUq3namym2 KRTA5Bi61m9IAnee7jxsL8++vm9eRuBNyjNbXjdkUqF9D5q/Wu4ujvDChlplnsqqH3PLLOV9oQq2Qm VFKhU3cTPyELITQ9PtDYkBevPK13IJ071Yfgb3jilFL/j7Jsump9OUHJzK7A== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230307_131816_963935_57CE49E4 X-CRM114-Status: GOOD ( 10.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This IP is a 10/100 MAC controller compliant with IEEE 802.3 standards. It supports power management with Energy Efficient Ethernet and Wake-on-LAN specification. Flow control is provided for half-duplex and full-duplex mode. For packet transmission and reception, the controller supports IPv4/UDP/TCP checksum offload and VLAN tag insertion. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index a67eeca28da5..394a5a61be59 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -438,6 +438,18 @@ mmc2: mmc@11250000 { status = "disabled"; }; + ethernet: ethernet@112a0000 { + compatible = "mediatek,mt8365-eth"; + reg = <0 0x112a0000 0 0x1000>; + mediatek,pericfg = <&infracfg>; + interrupts = ; + clocks = <&topckgen CLK_TOP_ETH_SEL>, + <&infracfg CLK_IFR_NIC_AXI>, + <&infracfg CLK_IFR_NIC_SLV_AXI>; + clock-names = "core", "reg", "trans"; + status = "disabled"; + }; + u3phy: t-phy@11cc0000 { compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>;