Message ID | 20230203-evk-board-support-v2-17-6ec7cdb10ccf@baylibre.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Improve the MT8365 SoC and EVK board support | expand |
Il 07/03/23 14:17, Alexandre Mergnat ha scritto: > From: Amjad Ouled-Ameur <aouledameur@baylibre.com> > > MT8365 has a SYST timer (System Timer), therefore the compatible node > should be "mediatek,mt6765-timer" instead of "mediatek,mt6795-systimer" > (which corresponds to ARM/ARM64 System Timer). So this is not a CPUXGPT, not a GPT, but a SYST? At this point, this should not be even introduced because commit [1] is not in linux-next yet. [1]: https://lore.kernel.org/all/20230125143503.1015424-10-bero@baylibre.com/ Matthias, please take note... Regards, Angelo
Hi, On Thu, Mar 9, 2023 at 2:32 PM AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote: > > Il 07/03/23 14:17, Alexandre Mergnat ha scritto: > > From: Amjad Ouled-Ameur <aouledameur@baylibre.com> > > > > MT8365 has a SYST timer (System Timer), therefore the compatible node > > should be "mediatek,mt6765-timer" instead of "mediatek,mt6795-systimer" > > (which corresponds to ARM/ARM64 System Timer). > > So this is not a CPUXGPT, not a GPT, but a SYST? > > At this point, this should not be even introduced because commit [1] is > not in linux-next yet. > > [1]: https://lore.kernel.org/all/20230125143503.1015424-10-bero@baylibre.com/ I've posted a new revision of this patchset containing the systimer fix. https://lore.kernel.org/linux-mediatek/20230309143459.401783-1-bero@baylibre.com/ ttyl bero
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index c3ea3cc97a47..959d8533c24c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -575,9 +575,9 @@ system_clk: dummy13m { }; systimer: timer@10017000 { - compatible = "mediatek,mt8365-systimer", "mediatek,mt6795-systimer"; - reg = <0 0x10017000 0 0x10>; - interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_LOW>; + compatible = "mediatek,mt8365-systimer", "mediatek,mt6765-timer"; + reg = <0 0x10017000 0 0x100>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; clocks = <&system_clk>; clock-names = "clk13m"; };