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Sat, 4 Feb 2023 09:35:20 -0500 (EST) From: Samuel Holland To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: Boris Brezillon , Jernej Skrabec , Chen-Yu Tsai , Samuel Holland , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 3/3] mtd: rawnand: sunxi: Precompute the ECC_CTL register value Date: Sat, 4 Feb 2023 08:35:20 -0600 Message-Id: <20230204143520.9682-4-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20230204143520.9682-1-samuel@sholland.org> References: <20230204143520.9682-1-samuel@sholland.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230204_063524_571772_2C15684C X-CRM114-Status: GOOD ( 13.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The value computed by this function never changes for a given chip. Compute the whole register value once up front, instead of every time the ECC engine is enabled. Signed-off-by: Samuel Holland --- Changes in v2: - Split ECC_CTL precomputation and structure updates to two patches drivers/mtd/nand/raw/sunxi_nand.c | 27 ++++++++++----------------- 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c index a0d0cb17c150..13e3e0198d15 100644 --- a/drivers/mtd/nand/raw/sunxi_nand.c +++ b/drivers/mtd/nand/raw/sunxi_nand.c @@ -172,10 +172,10 @@ struct sunxi_nand_chip_sel { /** * struct sunxi_nand_hw_ecc - stores information related to HW ECC support * - * @mode: the sunxi ECC mode field deduced from ECC requirements + * @ecc_ctl: ECC_CTL register value for this NAND chip */ struct sunxi_nand_hw_ecc { - int mode; + u32 ecc_ctl; }; /** @@ -689,26 +689,15 @@ static void sunxi_nfc_hw_ecc_enable(struct nand_chip *nand) { struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); - u32 ecc_ctl; - - ecc_ctl = readl(nfc->regs + NFC_REG_ECC_CTL); - ecc_ctl &= ~(NFC_ECC_MODE_MSK | NFC_ECC_PIPELINE | - NFC_ECC_BLOCK_SIZE_MSK); - ecc_ctl |= NFC_ECC_EN | NFC_ECC_MODE(sunxi_nand->ecc.mode) | - NFC_ECC_EXCEPTION | NFC_ECC_PIPELINE; - - if (nand->ecc.size == 512) - ecc_ctl |= NFC_ECC_BLOCK_512; - writel(ecc_ctl, nfc->regs + NFC_REG_ECC_CTL); + writel(sunxi_nand->ecc.ecc_ctl, nfc->regs + NFC_REG_ECC_CTL); } static void sunxi_nfc_hw_ecc_disable(struct nand_chip *nand) { struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); - writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_ECC_EN, - nfc->regs + NFC_REG_ECC_CTL); + writel(0, nfc->regs + NFC_REG_ECC_CTL); } static inline void sunxi_nfc_user_data_to_buf(u32 user_data, u8 *buf) @@ -1693,8 +1682,6 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand, return -ENOTSUPP; } - sunxi_nand->ecc.mode = i; - /* HW ECC always request ECC bytes for 1024 bytes blocks */ ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * 1024), 8); @@ -1726,6 +1713,12 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand, ecc->read_oob_raw = nand_read_oob_std; ecc->write_oob_raw = nand_write_oob_std; + sunxi_nand->ecc.ecc_ctl = NFC_ECC_MODE(i) | NFC_ECC_EXCEPTION | + NFC_ECC_PIPELINE | NFC_ECC_EN; + + if (ecc->size == 512) + sunxi_nand->ecc.ecc_ctl |= NFC_ECC_BLOCK_512; + return 0; }