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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id o13-20020a5d670d000000b002c8476dde7asm12657607wru.114.2023.03.07.05.46.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Mar 2023 05:46:40 -0800 (PST) From: Alexandre Mergnat Date: Tue, 07 Mar 2023 14:46:30 +0100 Subject: [PATCH 5/6] arm64: dts: mediatek: add larb support for mt8365 SoC MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v1-5-4f0c81fd52c1@baylibre.com> References: <20230207-iommu-support-v1-0-4f0c81fd52c1@baylibre.com> In-Reply-To: <20230207-iommu-support-v1-0-4f0c81fd52c1@baylibre.com> To: Krzysztof Kozlowski , Rob Herring , Matthias Brugger , Yong Wu , Krzysztof Kozlowski , AngeloGioacchino Del Regno Cc: linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2839; i=amergnat@baylibre.com; h=from:subject:message-id; bh=qbp237msdU+trOSTXH/QRPFc21+mI2NO5dacDzMLh3Q=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkB0A7RY2Eu1Vsstyo9EZBmvxVNAXGU4eCVVO9NKUb RbKMUBmJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZAdAOwAKCRArRkmdfjHURTIMD/ 0SlBZKOawWa2ITMV79h4OvYMNbPD2N5loSX22BXgssDKlMTqTpROMXcdDRngpwRY3Z/BkTDJ0aMU4h 4Fik0UmDuN/OS38NvWMCr9DVH/OlE//+e2RHSMapKekzs4rCi3c5PjiydkhyppvI530biL2GSWzjy6 T3UysY1XzjvDcIuypOiLCdJhiZvHl09zPRVFbptVvi3ie3h+A8AQCwFU7Fqs8pidJXJWTQSCmfn6a/ PL5cn752yH8SOJKVlxcA6vdJWQj/ojLc0kPTxF5I/XNHzmGCvYDuVw2mkVzplRyoRVPPG/Hg8m/wGE AnPByhCY0s+QIQmt+YFE+WFHJ1xetsyD+QbbY8bAH885FM751JzxVJeY7OBhRt9C2FBXWxEJfQyeqT ruhyTxoA6H8ohWjuromFLCsGlkDeCI3RTTj2ArCUeQRr4xXQEuaLVos6iYV4pvpp+mne7gcIQaPnyT RiWe7c7Ua0rFd3L3QUv83pr1tDVg3ODGkCAIBtj5cWWe082em64KpWCQyrVWKgw9W/bKxTOx7kILop 9wjPTNEkyK5LGNMaAdwkos9PZ2jQqOH0HCBC6IJd70ahzjGDEEtvgojy6tt0DmEZTTDQOi63tTPrye h9ZNNgml3mXf+TOTif62ZSfVFjBsJIQbPkLueDNbRDAUj1tQJwswrblJEnng== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230307_054642_887800_7636FC19 X-CRM114-Status: GOOD ( 10.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Local arbiter (LARB) is a component of Smart Multimedia Interface (SMI), used to help the memory management (IOMMU). This patch add 4 LARBs and 2 clocks for the larb1 and larb3 support. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 59 ++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 61333800ff4a..db0b897f58bb 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -725,12 +725,71 @@ smi_common: smi@14002000 { power-domains = <&spm MT8365_POWER_DOMAIN_MM>; }; + larb0: larb@14003000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x14003000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_LARB0>, + <&mmsys CLK_MM_MM_SMI_LARB0>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; + mediatek,larb-id = <0>; + }; + camsys: syscon@15000000 { compatible = "mediatek,mt8365-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; #clock-cells = <1>; }; + larb2: larb@15001000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x15001000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_IMG>, + <&camsys CLK_CAM_LARB2>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + mediatek,larb-id = <2>; + }; + + vdecsys: syscon@16000000 { + compatible = "mediatek,mt8365-vdecsys", "syscon"; + reg = <0 0x16000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb3: larb@16010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x16010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vdecsys CLK_VDEC_LARB1>, + <&vdecsys CLK_VDEC_LARB1>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>; + mediatek,larb-id = <3>; + }; + + vencsys: syscon@17000000 { + compatible = "mediatek,mt8365-vencsys", "syscon"; + reg = <0 0x17000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb1: larb@17010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x17010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vencsys CLK_VENC>, <&vencsys CLK_VENC>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VENC>; + mediatek,larb-id = <1>; + }; + apu: syscon@19020000 { compatible = "mediatek,mt8365-apu", "syscon"; reg = <0 0x19020000 0 0x1000>;