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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id d4-20020a05600c3ac400b003ee8a1bc220sm1378395wms.1.2023.04.05.01.07.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Apr 2023 01:07:57 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 05 Apr 2023 10:06:51 +0200 Subject: [PATCH v2 09/10] arm64: dts: mediatek: add iommu support for mt8365 SoC MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v2-9-60d5fa00e4e5@baylibre.com> References: <20230207-iommu-support-v2-0-60d5fa00e4e5@baylibre.com> In-Reply-To: <20230207-iommu-support-v2-0-60d5fa00e4e5@baylibre.com> To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Matthias Brugger , AngeloGioacchino Del Regno , Krzysztof Kozlowski Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1094; i=amergnat@baylibre.com; h=from:subject:message-id; bh=DnJEBHRsbqHL6qyjSRQDzaDxfH+izMrFh6xvaojG8T4=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkLSxTzSSOyVlKk+pu5ucK5KBC6oSvjigLIQZ1wJEe BFoarqKJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZC0sUwAKCRArRkmdfjHUReefEA CfZ6XqBVopXdvlrSr7JRl9epjtctr2LktwRUlcWmP666YL+2klZ5biMdhZNpTSKTCwranyUGVnHHnj 78LH1as+UKfp0rtoNTws+8LyzHzB2uLZx/DhnCKCVOW5JTwxNA3HId41CcgsrH7C/fT9oRb4wrm9QM h/Wy4RrilonigDtaYbWWVOyROij0gCpwB/PusTwS+0L0hjaax+NdsIfla9MebFpK5/jduofNoFQoaZ w4RHjH+2nihAqFNO575K9U3t0srSnCfOxtXNU+iCXtusNe3f7x15auC3gc3NWw4qcfXiDjvVbqLHVO tgBxpi+OQro/i3m8cK+5GmxdMhG6MtdWHddIZ5zRUIBisLJ9eWhEZm2KbJZxf3YOqm3jzTDHAk66r9 Vy3QvFXsAphJLFYxYhFNpZm3K4sASMGTsZpHaiis2BAgjszh7QSAL1iNhWgs7/59wKv4SyuWek8QBp TAF8h9Z9odOHxYT/cQNWe90YK2K2eo/3WTZ+QpmoSSHBPoAT/nK09l+r0OC+qNT3ZZNRBFlgtRHHrI F6NYlqyeWo7YGZBhAg9SkAkP4EEgfd1ZbMYboaLN+F2YuzoBOZH0OzZ3JCGA73LFohbHNhfzqribm+ o/Ti5VqGbE5NtUXy/aWXjbgpkQipcK8M11/UtFvd3b0uzijxE0TcD/w3g8SQ== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230405_090759_939552_FCC3ED8F X-CRM114-Status: GOOD ( 11.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add iommu support in the SoC DTS using the 4 local arbiters (LARBs) Reviewed-by: Yong Wu Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 07a7267f338e..6260744f4be5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -456,6 +456,14 @@ sysirq: interrupt-controller@10200a80 { reg = <0 0x10200a80 0 0x20>; }; + iommu: iommu@10205000 { + compatible = "mediatek,mt8365-m4u"; + reg = <0 0x10205000 0 0x1000>; + interrupts = ; + mediatek,larbs = <&larb0>, <&larb1>, <&larb2>, <&larb3>; + #iommu-cells = <1>; + }; + infracfg_nao: infracfg@1020e000 { compatible = "mediatek,mt8365-infracfg", "syscon"; reg = <0 0x1020e000 0 0x1000>;