From patchwork Sat Feb 11 03:14:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 13136806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8187AC05027 for ; Sat, 11 Feb 2023 03:18:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=arlfzn8oy0sLpnJEOvqGbi66pow92hG54I76ZtWXrr8=; b=hQ/SmwzgDrUnCyHvLAMdoaXCyX V+cvO49SLER4bR9Z7Y6MMGGJwuqMpYx4QqgtDBstw0BiG+l/z6t86xGRNIJvshPegAYnJkVyUiM3i AF/wb3UJJ/aNizo724ny/0f8R4mfoFfKHcHIzrvX3A4wocKJW3QtsTuJm9LZXxseZfN30Q9rc44Vl xA/FNhfSlH9ErgOxw0MUCHa+QhZ4t1+mtmUOmbKLbVTJe/ni1rnRIecZ8/Z4/IMT/3vmdp2SyRi8S o5N+twx19BCKIXGhkqwIWXa016TuPU9eGof58xa87NgVEttSVXW+O3DLLMvJELakk4IU0Z3mzjL3K gH1MgWrA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pQgOT-008RFu-OQ; Sat, 11 Feb 2023 03:17:42 +0000 Received: from mail-yb1-xb49.google.com ([2607:f8b0:4864:20::b49]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pQgNb-008Qpw-Pt for linux-arm-kernel@lists.infradead.org; Sat, 11 Feb 2023 03:16:49 +0000 Received: by mail-yb1-xb49.google.com with SMTP id x15-20020a25accf000000b008efe9505b2eso3403606ybd.22 for ; Fri, 10 Feb 2023 19:16:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=MCXnOb6jcGTB9kCRmfw+USzftBG5GbuvoabNuXgoEVU=; b=bcxD3LvkYnFpmSe0OOL5FnK+rcgRPLQvdZMgoUbwJlzTZUXvvFht0hWOAbfD7fwzMO PPIKczBG/uxBejjRAsvzVLhSrjdI/XfTYxwnP54eZLr49fS9EJoBG2Q0MH5dW24sYWqG 5rNeWjkrE89NWC6RTldgbiiFH+NAgkp8riAo/SLTdV1FyPQVQLJCttGqfcgxpaqUrr3A zzSkEHZfzAhjy+YE86HtZC6EYQg14ZzQWfWsNvBgBFvWVMG6eabvewT9/VQlVz2wn8gw AOW9WnUeK+JJvztH/lgimLiRkf8TPFLh5nIwD42T3+mLmJ5BUTDG3Y2uZhctSzK+p8u7 IR8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=MCXnOb6jcGTB9kCRmfw+USzftBG5GbuvoabNuXgoEVU=; b=7TC0t0rOdfuscmogf5nltrq8B+i/BXWjNcqSY4kjac6ttuusbVObOraGkJHB+1wAEO jgSzJXhu1xRdi5x0fFypE5FSv+3hfT+mMzKEzyJwqYDEo99rlG/ZBGaDk8h7vfKeFLo0 Vsjp9tJ9K+yDv806Dkqv346fWF9Q3HMK7WoTSL/kl1eay4KMeEgT2cQgnXVO1qgYvhYy 3Xeis35A0tRRpiEoJs6HXMKlJcs2+MWbH2XhxxryJ13vu0hRC/JEeY111BGLyroV+G3m X5JQ3md6AoexDS5j32VxVvmdOOb5jkBHHdl9Zo8VNxTNe0OLtNB/5/S2GM8QjOewiR0J 4/wg== X-Gm-Message-State: AO0yUKUcQEb79TP8KdCh3SAPeo7PrMVJ0kH2MTClXHV6guB7xHvLYXvZ bWjWICP8UI/QS8gyPTypuvokdC/wdwc= X-Google-Smtp-Source: AK7set9ycbZcIhKY2lEr5PmnL1aLgmVOCXQ7NCzmiSMYPzzadl1xbEaheY9neKH5tD47DeO3FkS/ZiIqyJc= X-Received: from reijiw-west4.c.googlers.com ([fda3:e722:ac3:cc00:20:ed76:c0a8:aa1]) (user=reijiw job=sendgmr) by 2002:a25:69c2:0:b0:8b4:7955:9223 with SMTP id e185-20020a2569c2000000b008b479559223mr8ybc.8.1676085405916; Fri, 10 Feb 2023 19:16:45 -0800 (PST) Date: Fri, 10 Feb 2023 19:14:59 -0800 In-Reply-To: <20230211031506.4159098-1-reijiw@google.com> Mime-Version: 1.0 References: <20230211031506.4159098-1-reijiw@google.com> X-Mailer: git-send-email 2.39.1.581.gbfd45094c4-goog Message-ID: <20230211031506.4159098-8-reijiw@google.com> Subject: [PATCH v4 07/14] KVM: arm64: PMU: Simplify extracting PMCR_EL0.N From: Reiji Watanabe To: Marc Zyngier , Oliver Upton , kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Zenghui Yu , Suzuki K Poulose , Paolo Bonzini , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata , Shaoqin Huang , Reiji Watanabe X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230210_191647_879128_4FA29D90 X-CRM114-Status: GOOD ( 14.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some code extracts PMCR_EL0.N using ARMV8_PMU_PMCR_N_SHIFT and ARMV8_PMU_PMCR_N_MASK. Define ARMV8_PMU_PMCR_N (0x1f << 11), and simplify those codes using FIELD_GET() and/or ARMV8_PMU_PMCR_N. The following patches will also use these macros to extract PMCR_EL0.N. No functional change intended. Signed-off-by: Reiji Watanabe --- arch/arm64/include/asm/perf_event.h | 2 +- arch/arm64/kernel/perf_event.c | 3 +-- arch/arm64/kvm/pmu-emul.c | 3 +-- arch/arm64/kvm/sys_regs.c | 7 +++---- 4 files changed, 6 insertions(+), 9 deletions(-) diff --git a/arch/arm64/include/asm/perf_event.h b/arch/arm64/include/asm/perf_event.h index 3eaf462f5752..eeef8d56d9c8 100644 --- a/arch/arm64/include/asm/perf_event.h +++ b/arch/arm64/include/asm/perf_event.h @@ -219,7 +219,7 @@ #define ARMV8_PMU_PMCR_LC (1 << 6) /* Overflow on 64 bit cycle counter */ #define ARMV8_PMU_PMCR_LP (1 << 7) /* Long event counter enable */ #define ARMV8_PMU_PMCR_N_SHIFT 11 /* Number of counters supported */ -#define ARMV8_PMU_PMCR_N_MASK 0x1f +#define ARMV8_PMU_PMCR_N (0x1f << ARMV8_PMU_PMCR_N_SHIFT) #define ARMV8_PMU_PMCR_MASK 0xff /* Mask for writable bits */ /* diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index a5193f2146a6..1775d89a9144 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -1158,8 +1158,7 @@ static void __armv8pmu_probe_pmu(void *info) probe->present = true; /* Read the nb of CNTx counters supported from PMNC */ - cpu_pmu->num_events = (armv8pmu_pmcr_read() >> ARMV8_PMU_PMCR_N_SHIFT) - & ARMV8_PMU_PMCR_N_MASK; + cpu_pmu->num_events = FIELD_GET(ARMV8_PMU_PMCR_N, armv8pmu_pmcr_read()); /* Add the CPU cycles counter */ cpu_pmu->num_events += 1; diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c index 701728ad78d6..9dbf532e264e 100644 --- a/arch/arm64/kvm/pmu-emul.c +++ b/arch/arm64/kvm/pmu-emul.c @@ -246,9 +246,8 @@ void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu) { - u64 val = __vcpu_sys_reg(vcpu, PMCR_EL0) >> ARMV8_PMU_PMCR_N_SHIFT; + u64 val = FIELD_GET(ARMV8_PMU_PMCR_N, __vcpu_sys_reg(vcpu, PMCR_EL0)); - val &= ARMV8_PMU_PMCR_N_MASK; if (val == 0) return BIT(ARMV8_PMU_CYCLE_IDX); else diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 790f028a1686..9b410a2ea20c 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -629,7 +629,7 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) return; /* Only preserve PMCR_EL0.N, and reset the rest to 0 */ - pmcr = read_sysreg(pmcr_el0) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT); + pmcr = read_sysreg(pmcr_el0) & ARMV8_PMU_PMCR_N; if (!kvm_supports_32bit_el0()) pmcr |= ARMV8_PMU_PMCR_LC; @@ -736,10 +736,9 @@ static bool access_pmceid(struct kvm_vcpu *vcpu, struct sys_reg_params *p, static bool pmu_counter_idx_valid(struct kvm_vcpu *vcpu, u64 idx) { - u64 pmcr, val; + u64 val; - pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); - val = (pmcr >> ARMV8_PMU_PMCR_N_SHIFT) & ARMV8_PMU_PMCR_N_MASK; + val = FIELD_GET(ARMV8_PMU_PMCR_N, __vcpu_sys_reg(vcpu, PMCR_EL0)); if (idx >= val && idx != ARMV8_PMU_CYCLE_IDX) { kvm_inject_undefined(vcpu); return false;