diff mbox series

[v3,2/4] arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink

Message ID 20230213162821.1253831-3-quic_bjorande@quicinc.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: qcom: sc8280xp: Enable external display | expand

Commit Message

Bjorn Andersson Feb. 13, 2023, 4:28 p.m. UTC 
From: Bjorn Andersson <bjorn.andersson@linaro.org>

The SC8280XP CRD control over battery management and its two USB Type-C
port using pmic_glink and two GPIO-based SBU muxes.

Enable the two DisplayPort instances, GPIO SBU mux instance and
pmic_glink with the two connectors on the CRD.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---

Changes since v2:
- Added empty line between properties and child nodes.

 arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 208 +++++++++++++++++++++-
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi    |  10 ++
 2 files changed, 216 insertions(+), 2 deletions(-)

Comments

Konrad Dybcio Feb. 13, 2023, 8:44 p.m. UTC | #1 
On 13.02.2023 17:28, Bjorn Andersson wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
> 
> The SC8280XP CRD control over battery management and its two USB Type-C
> port using pmic_glink and two GPIO-based SBU muxes.
> 
> Enable the two DisplayPort instances, GPIO SBU mux instance and
> pmic_glink with the two connectors on the CRD.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
> 
[...]

> +&mdss0_dp0 {
> +	data-lanes = <0 1>;
> +	status = "okay";
> +
> +	ports {
> +		port@1 {
> +			reg = <1>;
> +
> +			mdss0_dp0_out: endpoint {
> +				remote-endpoint = <&pmic_glink_con0_ss>;
> +			};
> +		};
> +	};
> +};
> +
> +&mdss0_dp1 {
> +	data-lanes = <0 1>;
> +	status = "okay";
> +
> +	ports {
> +		port@1 {
> +			reg = <1>;
This way you're redefining this node.. I suppose going with
something like:

8280:
mdss0_dp1 {
	compatible
	blahblah

	ports {
		[..]

		port@1 {
		reg = <1>;

			mdss0_dp1_out : endpoint {
			};
		};
	}
}

crd:
&mdss0_dp1_out {
	//btw data-lanes should be there and not in mdss_dp, I think
	remote-endpoint = <&pmic_glink_...>
}

would be better, and that's what we're already doing for DSI..

I think I missed all this during the 8[34]50 review too..

With that addressed, for both crd and x13s (as the patch is essentially
identical)

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad

> +
> +			mdss0_dp1_out: endpoint {
> +				remote-endpoint = <&pmic_glink_con1_ss>;
> +			};
> +		};
> +	};
> +};
> +
>  &mdss0_dp3 {
>  	compatible = "qcom,sc8280xp-edp";
>  	/delete-property/ #sound-dai-cells;
> @@ -480,7 +628,6 @@ &usb_0 {
>  };
>  
>  &usb_0_dwc3 {
> -	/* TODO: Define USB-C connector properly */
>  	dr_mode = "host";
>  };
>  
> @@ -499,12 +646,15 @@ &usb_0_qmpphy {
>  	status = "okay";
>  };
>  
> +&usb_0_role_switch {
> +	remote-endpoint = <&pmic_glink_con0_hs>;
> +};
> +
>  &usb_1 {
>  	status = "okay";
>  };
>  
>  &usb_1_dwc3 {
> -	/* TODO: Define USB-C connector properly */
>  	dr_mode = "host";
>  };
>  
> @@ -523,6 +673,10 @@ &usb_1_qmpphy {
>  	status = "okay";
>  };
>  
> +&usb_1_role_switch {
> +	remote-endpoint = <&pmic_glink_con1_hs>;
> +};
> +
>  &xo_board_clk {
>  	clock-frequency = <38400000>;
>  };
> @@ -709,4 +863,54 @@ reset-n-pins {
>  			drive-strength = <16>;
>  		};
>  	};
> +
> +	usb0_sbu_default: usb0-sbu-state {
> +		oe-n-pins {
> +			pins = "gpio101";
> +			function = "gpio";
> +			bias-disable;
> +			drive-strengh = <16>;
> +			output-high;
> +		};
> +
> +		sel-pins {
> +			pins = "gpio164";
> +			function = "gpio";
> +			bias-disable;
> +			drive-strength = <16>;
> +		};
> +
> +		mode-pins {
> +			pins = "gpio167";
> +			function = "gpio";
> +			bias-disable;
> +			drive-strength = <16>;
> +			output-high;
> +		};
> +	};
> +
> +	usb1_sbu_default: usb1-sbu-state {
> +		oe-n-pins {
> +			pins = "gpio48";
> +			function = "gpio";
> +			bias-disable;
> +			drive-strengh = <16>;
> +			output-high;
> +		};
> +
> +		sel-pins {
> +			pins = "gpio47";
> +			function = "gpio";
> +			bias-disable;
> +			drive-strength = <16>;
> +		};
> +
> +		mode-pins {
> +			pins = "gpio50";
> +			function = "gpio";
> +			bias-disable;
> +			drive-strength = <16>;
> +			output-high;
> +		};
> +	};
>  };
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 92d5b5e21e50..7897d33f1416 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -3040,6 +3040,11 @@ usb_0_dwc3: usb@a600000 {
>  				iommus = <&apps_smmu 0x820 0x0>;
>  				phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
>  				phy-names = "usb2-phy", "usb3-phy";
> +
> +				port {
> +					usb_0_role_switch: endpoint {
> +					};
> +				};
>  			};
>  		};
>  
> @@ -3095,6 +3100,11 @@ usb_1_dwc3: usb@a800000 {
>  				iommus = <&apps_smmu 0x860 0x0>;
>  				phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
>  				phy-names = "usb2-phy", "usb3-phy";
> +
> +				port {
> +					usb_1_role_switch: endpoint {
> +					};
> +				};
>  			};
>  		};
>
Bjorn Andersson Feb. 13, 2023, 9:58 p.m. UTC | #2 
On Mon, Feb 13, 2023 at 09:44:14PM +0100, Konrad Dybcio wrote:
> 
> 
> On 13.02.2023 17:28, Bjorn Andersson wrote:
> > From: Bjorn Andersson <bjorn.andersson@linaro.org>
> > 
> > The SC8280XP CRD control over battery management and its two USB Type-C
> > port using pmic_glink and two GPIO-based SBU muxes.
> > 
> > Enable the two DisplayPort instances, GPIO SBU mux instance and
> > pmic_glink with the two connectors on the CRD.
> > 
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> > ---
> > 
> [...]
> 
> > +&mdss0_dp0 {
> > +	data-lanes = <0 1>;
> > +	status = "okay";
> > +
> > +	ports {
> > +		port@1 {
> > +			reg = <1>;
> > +
> > +			mdss0_dp0_out: endpoint {
> > +				remote-endpoint = <&pmic_glink_con0_ss>;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&mdss0_dp1 {
> > +	data-lanes = <0 1>;
> > +	status = "okay";
> > +
> > +	ports {
> > +		port@1 {
> > +			reg = <1>;
> This way you're redefining this node.. I suppose going with
> something like:
> 
> 8280:
> mdss0_dp1 {
> 	compatible
> 	blahblah
> 
> 	ports {
> 		[..]
> 
> 		port@1 {
> 		reg = <1>;
> 
> 			mdss0_dp1_out : endpoint {
> 			};
> 		};
> 	}
> }
> 
> crd:
> &mdss0_dp1_out {
> 	//btw data-lanes should be there and not in mdss_dp, I think
> 	remote-endpoint = <&pmic_glink_...>
> }
> 
> would be better, and that's what we're already doing for DSI..
> 

To summarize our private discussion about this; by aiming for not
repeating the structure from the dtsi we avoid a class of bugs caused by
typos between the two files. As such I agree that this is a good thing,
and have adjusted the structure accordingly in v4.

> I think I missed all this during the 8[34]50 review too..
> 
> With that addressed, for both crd and x13s (as the patch is essentially
> identical)
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> 

Thanks,
Bjorn

> Konrad
> 
> > +
> > +			mdss0_dp1_out: endpoint {
> > +				remote-endpoint = <&pmic_glink_con1_ss>;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> >  &mdss0_dp3 {
> >  	compatible = "qcom,sc8280xp-edp";
> >  	/delete-property/ #sound-dai-cells;
> > @@ -480,7 +628,6 @@ &usb_0 {
> >  };
> >  
> >  &usb_0_dwc3 {
> > -	/* TODO: Define USB-C connector properly */
> >  	dr_mode = "host";
> >  };
> >  
> > @@ -499,12 +646,15 @@ &usb_0_qmpphy {
> >  	status = "okay";
> >  };
> >  
> > +&usb_0_role_switch {
> > +	remote-endpoint = <&pmic_glink_con0_hs>;
> > +};
> > +
> >  &usb_1 {
> >  	status = "okay";
> >  };
> >  
> >  &usb_1_dwc3 {
> > -	/* TODO: Define USB-C connector properly */
> >  	dr_mode = "host";
> >  };
> >  
> > @@ -523,6 +673,10 @@ &usb_1_qmpphy {
> >  	status = "okay";
> >  };
> >  
> > +&usb_1_role_switch {
> > +	remote-endpoint = <&pmic_glink_con1_hs>;
> > +};
> > +
> >  &xo_board_clk {
> >  	clock-frequency = <38400000>;
> >  };
> > @@ -709,4 +863,54 @@ reset-n-pins {
> >  			drive-strength = <16>;
> >  		};
> >  	};
> > +
> > +	usb0_sbu_default: usb0-sbu-state {
> > +		oe-n-pins {
> > +			pins = "gpio101";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strengh = <16>;
> > +			output-high;
> > +		};
> > +
> > +		sel-pins {
> > +			pins = "gpio164";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strength = <16>;
> > +		};
> > +
> > +		mode-pins {
> > +			pins = "gpio167";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strength = <16>;
> > +			output-high;
> > +		};
> > +	};
> > +
> > +	usb1_sbu_default: usb1-sbu-state {
> > +		oe-n-pins {
> > +			pins = "gpio48";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strengh = <16>;
> > +			output-high;
> > +		};
> > +
> > +		sel-pins {
> > +			pins = "gpio47";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strength = <16>;
> > +		};
> > +
> > +		mode-pins {
> > +			pins = "gpio50";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strength = <16>;
> > +			output-high;
> > +		};
> > +	};
> >  };
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > index 92d5b5e21e50..7897d33f1416 100644
> > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > @@ -3040,6 +3040,11 @@ usb_0_dwc3: usb@a600000 {
> >  				iommus = <&apps_smmu 0x820 0x0>;
> >  				phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
> >  				phy-names = "usb2-phy", "usb3-phy";
> > +
> > +				port {
> > +					usb_0_role_switch: endpoint {
> > +					};
> > +				};
> >  			};
> >  		};
> >  
> > @@ -3095,6 +3100,11 @@ usb_1_dwc3: usb@a800000 {
> >  				iommus = <&apps_smmu 0x860 0x0>;
> >  				phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> >  				phy-names = "usb2-phy", "usb3-phy";
> > +
> > +				port {
> > +					usb_1_role_switch: endpoint {
> > +					};
> > +				};
> >  			};
> >  		};
> >
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
index 2179c06b4e3b..7778ddd601f0 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
@@ -36,6 +36,84 @@  chosen {
 		stdout-path = "serial0:115200n8";
 	};
 
+	pmic-glink {
+		compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		connector@0 {
+			compatible = "usb-c-connector";
+			reg = <0>;
+			power-role = "dual";
+			data-role = "dual";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					pmic_glink_con0_hs: endpoint {
+						remote-endpoint = <&usb_0_role_switch>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+
+					pmic_glink_con0_ss: endpoint {
+						remote-endpoint = <&mdss0_dp0_out>;
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+
+					pmic_glink_con0_sbu: endpoint {
+						remote-endpoint = <&usb0_sbu_mux>;
+					};
+				};
+			};
+		};
+
+		connector@1 {
+			compatible = "usb-c-connector";
+			reg = <1>;
+			power-role = "dual";
+			data-role = "dual";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				port@0 {
+					reg = <0>;
+
+					pmic_glink_con1_hs: endpoint {
+						remote-endpoint = <&usb_1_role_switch>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+
+					pmic_glink_con1_ss: endpoint {
+						remote-endpoint = <&mdss0_dp1_out>;
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+
+					pmic_glink_con1_sbu: endpoint {
+						remote-endpoint = <&usb1_sbu_mux>;
+					};
+				};
+			};
+		};
+	};
+
 	vreg_edp_3p3: regulator-edp-3p3 {
 		compatible = "regulator-fixed";
 
@@ -139,6 +217,46 @@  linux,cma {
 			linux,cma-default;
 		};
 	};
+
+	usb0-sbu-mux {
+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";
+
+		enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
+		select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb0_sbu_default>;
+
+		mode-switch;
+		orientation-switch;
+		svid = /bits/ 16 <0xff01>;
+
+		port {
+			usb0_sbu_mux: endpoint {
+				remote-endpoint = <&pmic_glink_con0_sbu>;
+			};
+		};
+	};
+
+	usb1-sbu-mux {
+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";
+
+		enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
+		select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb1_sbu_default>;
+
+		mode-switch;
+		orientation-switch;
+		svid = /bits/ 16 <0xff01>;
+
+		port {
+			usb1_sbu_mux: endpoint {
+				remote-endpoint = <&pmic_glink_con1_sbu>;
+			};
+		};
+	};
 };
 
 &apps_rsc {
@@ -262,6 +380,36 @@  &mdss0 {
 	status = "okay";
 };
 
+&mdss0_dp0 {
+	data-lanes = <0 1>;
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			mdss0_dp0_out: endpoint {
+				remote-endpoint = <&pmic_glink_con0_ss>;
+			};
+		};
+	};
+};
+
+&mdss0_dp1 {
+	data-lanes = <0 1>;
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			mdss0_dp1_out: endpoint {
+				remote-endpoint = <&pmic_glink_con1_ss>;
+			};
+		};
+	};
+};
+
 &mdss0_dp3 {
 	compatible = "qcom,sc8280xp-edp";
 	/delete-property/ #sound-dai-cells;
@@ -480,7 +628,6 @@  &usb_0 {
 };
 
 &usb_0_dwc3 {
-	/* TODO: Define USB-C connector properly */
 	dr_mode = "host";
 };
 
@@ -499,12 +646,15 @@  &usb_0_qmpphy {
 	status = "okay";
 };
 
+&usb_0_role_switch {
+	remote-endpoint = <&pmic_glink_con0_hs>;
+};
+
 &usb_1 {
 	status = "okay";
 };
 
 &usb_1_dwc3 {
-	/* TODO: Define USB-C connector properly */
 	dr_mode = "host";
 };
 
@@ -523,6 +673,10 @@  &usb_1_qmpphy {
 	status = "okay";
 };
 
+&usb_1_role_switch {
+	remote-endpoint = <&pmic_glink_con1_hs>;
+};
+
 &xo_board_clk {
 	clock-frequency = <38400000>;
 };
@@ -709,4 +863,54 @@  reset-n-pins {
 			drive-strength = <16>;
 		};
 	};
+
+	usb0_sbu_default: usb0-sbu-state {
+		oe-n-pins {
+			pins = "gpio101";
+			function = "gpio";
+			bias-disable;
+			drive-strengh = <16>;
+			output-high;
+		};
+
+		sel-pins {
+			pins = "gpio164";
+			function = "gpio";
+			bias-disable;
+			drive-strength = <16>;
+		};
+
+		mode-pins {
+			pins = "gpio167";
+			function = "gpio";
+			bias-disable;
+			drive-strength = <16>;
+			output-high;
+		};
+	};
+
+	usb1_sbu_default: usb1-sbu-state {
+		oe-n-pins {
+			pins = "gpio48";
+			function = "gpio";
+			bias-disable;
+			drive-strengh = <16>;
+			output-high;
+		};
+
+		sel-pins {
+			pins = "gpio47";
+			function = "gpio";
+			bias-disable;
+			drive-strength = <16>;
+		};
+
+		mode-pins {
+			pins = "gpio50";
+			function = "gpio";
+			bias-disable;
+			drive-strength = <16>;
+			output-high;
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 92d5b5e21e50..7897d33f1416 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -3040,6 +3040,11 @@  usb_0_dwc3: usb@a600000 {
 				iommus = <&apps_smmu 0x820 0x0>;
 				phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
 				phy-names = "usb2-phy", "usb3-phy";
+
+				port {
+					usb_0_role_switch: endpoint {
+					};
+				};
 			};
 		};
 
@@ -3095,6 +3100,11 @@  usb_1_dwc3: usb@a800000 {
 				iommus = <&apps_smmu 0x860 0x0>;
 				phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
 				phy-names = "usb2-phy", "usb3-phy";
+
+				port {
+					usb_1_role_switch: endpoint {
+					};
+				};
 			};
 		};