From patchwork Mon Feb 13 18:02:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raghavendra Rao Ananta X-Patchwork-Id: 13138785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51A96C636D4 for ; Mon, 13 Feb 2023 18:04:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=lb5Hewti0Z2N5BCC4Phorglp42WZZbaeWYTT6dLXg+Q=; b=vhh3uPpPzlllNVGCojrH4EOajX +zkuuVXqfZfJpz6PHapQRVjSxeGd0f9tayZ4BFBCFfDiFLdeJ6jy0FnQK56ONgJABSwsBpi9u/Cqi wHQSomMqHK6QehTBognWdqFEnAuHhuKI6+P8VUMTfUFN1VhMf+6NUIOW/4XELDmDe5aP/KRpp/oz7 IRcVbY5dv2IpupvdR/hYeQ2OW/zeXRuYw9w56Qfzt7K6LHitU+H8GovBNUDolz8ohdOM6pA+F4YKq 3P0XjmJVGpfnYu3evPWpZ+Gyqix9EAsFpJ7EF6hp59o9g52onuF1UAVigD6wylPHta2aqMaYI5USK 9l+1P6CA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pRdAQ-00FlmH-9c; Mon, 13 Feb 2023 18:03:06 +0000 Received: from mail-il1-x149.google.com ([2607:f8b0:4864:20::149]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pRdA5-00Flav-18 for linux-arm-kernel@lists.infradead.org; Mon, 13 Feb 2023 18:02:46 +0000 Received: by mail-il1-x149.google.com with SMTP id i7-20020a056e021b0700b003033a763270so9850900ilv.19 for ; Mon, 13 Feb 2023 10:02:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=m5yslkEpatxEcn+ZjK5j+e94Zo++KRDXawZarevQP94=; b=lcEuCEa97ssf+wWD9q1X2jC8NG6WwfI+HwutzvJgCa6Uq+ZlQvO6nZ4fTZ1DOuWvCH QYfQMES86DFpGnJNaCKSYUITRt/fnbFRlV24rRk/9s+HJOK4uK3HUoXbUfKpYuWWbdGM JAkmmiPtglLKasxoEqGau0AV+ap1NMUKKv6f9Q0J6+GYYOqy5tXTw0cA3vI0PsY+8Ti9 6DRHzCp9lRTmscj+OMpjzyRj19bIqkMSdns7IbL4DdWskvbfqjdhHYeYx/pEtPAC/xpy 7SX2rfvXEDyQVkwgmKnDgLQKOy/Rc39ynIF8Wwbekx9vLgo9IWDVOMuK3NLGvfW1CAvj N/RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=m5yslkEpatxEcn+ZjK5j+e94Zo++KRDXawZarevQP94=; b=3S70oMEnUkD7o+K6Q95MP+SXU9mVyPwQv0C7KPsENl1zUYbzDgAxqaDaMYX8a3uXA4 doeE1i54ucFQQArUlDoNKHxPOUYYrG3CFHGZn1ozHvz0OUl5GrFS8MoKAo41xS1scLdW 9BAootuWs7G5j9o2G72yfQ4cAoJcZy5t/3Tp2eX3QSLl7E1wJxJIQmYSOkAvSIC0JGe0 bLYml2ZHOUZJVWwWxAMfP8vONhQki5ervXURowSgdP+5ia4DMva5XIokClrVJfwliDal Dkm9PKn0G/nPX5FJ5Ykl8FwosMMO/w7VNIGaVoaLt+WKpHPWni2A7Pk8myIpt4gUIZiX ZG2Q== X-Gm-Message-State: AO0yUKUXI0sC1FfbeTJFqiBRutTuNGDDONTjzYA4Ou2CyUyGI0d9O7V3 QXlKhgM1cmnTbieuPGTAC/1B+fcbn3qm X-Google-Smtp-Source: AK7set/0edXrdMAO+nSquBaytN7bLQuBx2MZ7S0viOK1DwWUM7ZNzi/YO3vgRtPP1oEgxZM2YSawlRvX5KHR X-Received: from rananta-linux.c.googlers.com ([fda3:e722:ac3:cc00:2b:ff92:c0a8:22b5]) (user=rananta job=sendgmr) by 2002:a02:854b:0:b0:3a7:e46f:1016 with SMTP id g69-20020a02854b000000b003a7e46f1016mr298jai.0.1676311363803; Mon, 13 Feb 2023 10:02:43 -0800 (PST) Date: Mon, 13 Feb 2023 18:02:25 +0000 In-Reply-To: <20230213180234.2885032-1-rananta@google.com> Mime-Version: 1.0 References: <20230213180234.2885032-1-rananta@google.com> X-Mailer: git-send-email 2.39.1.581.gbfd45094c4-goog Message-ID: <20230213180234.2885032-5-rananta@google.com> Subject: [PATCH 04/13] selftests: KVM: aarch64: Add PMU cycle counter helpers From: Raghavendra Rao Ananta To: Oliver Upton , Reiji Watanabe , Marc Zyngier , Ricardo Koller , James Morse , Suzuki K Poulose Cc: Paolo Bonzini , Jing Zhang , Colton Lewis , Raghavendra Rao Anata , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230213_100245_108183_9A473D49 X-CRM114-Status: UNSURE ( 9.35 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add basic helpers for the test to access the cycle counter registers. The helpers will be used in the upcoming patches to run the tests related to cycle counter. No functional change intended. Signed-off-by: Raghavendra Rao Ananta --- .../testing/selftests/kvm/aarch64/vpmu_test.c | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/tools/testing/selftests/kvm/aarch64/vpmu_test.c b/tools/testing/selftests/kvm/aarch64/vpmu_test.c index d72c3c9b9c39f..15aebc7d7dc94 100644 --- a/tools/testing/selftests/kvm/aarch64/vpmu_test.c +++ b/tools/testing/selftests/kvm/aarch64/vpmu_test.c @@ -147,6 +147,46 @@ static inline void disable_counter(int idx) isb(); } +static inline uint64_t read_cycle_counter(void) +{ + return read_sysreg(pmccntr_el0); +} + +static inline void reset_cycle_counter(void) +{ + uint64_t v = read_sysreg(pmcr_el0); + + write_sysreg(ARMV8_PMU_PMCR_C | v, pmcr_el0); + isb(); +} + +static inline void enable_cycle_counter(void) +{ + uint64_t v = read_sysreg(pmcntenset_el0); + + write_sysreg(ARMV8_PMU_CNTENSET_C | v, pmcntenset_el0); + isb(); +} + +static inline void disable_cycle_counter(void) +{ + uint64_t v = read_sysreg(pmcntenset_el0); + + write_sysreg(ARMV8_PMU_CNTENSET_C | v, pmcntenclr_el0); + isb(); +} + +static inline void write_pmccfiltr(unsigned long val) +{ + write_sysreg(val, pmccfiltr_el0); + isb(); +} + +static inline uint64_t read_pmccfiltr(void) +{ + return read_sysreg(pmccfiltr_el0); +} + static inline uint64_t get_pmcr_n(void) { return FIELD_GET(ARMV8_PMU_PMCR_N, read_sysreg(pmcr_el0));