| Message ID | 20230215010717.3612794-8-rananta@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for vPMU selftests | expand |
Hi Raghu, On Tue, Feb 14, 2023 at 5:07 PM Raghavendra Rao Ananta <rananta@google.com> wrote: > > Add basic helpers for the test to access the cycle counter > registers. The helpers will be used in the upcoming patches > to run the tests related to cycle counter. > > No functional change intended. > > Signed-off-by: Raghavendra Rao Ananta <rananta@google.com> > --- > .../testing/selftests/kvm/aarch64/vpmu_test.c | 40 +++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/tools/testing/selftests/kvm/aarch64/vpmu_test.c b/tools/testing/selftests/kvm/aarch64/vpmu_test.c > index d72c3c9b9c39f..15aebc7d7dc94 100644 > --- a/tools/testing/selftests/kvm/aarch64/vpmu_test.c > +++ b/tools/testing/selftests/kvm/aarch64/vpmu_test.c > @@ -147,6 +147,46 @@ static inline void disable_counter(int idx) > isb(); > } > > +static inline uint64_t read_cycle_counter(void) > +{ > + return read_sysreg(pmccntr_el0); > +} > + > +static inline void reset_cycle_counter(void) > +{ > + uint64_t v = read_sysreg(pmcr_el0); > + > + write_sysreg(ARMV8_PMU_PMCR_C | v, pmcr_el0); > + isb(); > +} > + > +static inline void enable_cycle_counter(void) > +{ > + uint64_t v = read_sysreg(pmcntenset_el0); > + > + write_sysreg(ARMV8_PMU_CNTENSET_C | v, pmcntenset_el0); > + isb(); > +} You might want to use enable_counter() and disable_counter() from enable_cycle_counter() and disable_cycle_counter() respectively? Thank you, Reiji > + > +static inline void disable_cycle_counter(void) > +{ > + uint64_t v = read_sysreg(pmcntenset_el0); > + > + write_sysreg(ARMV8_PMU_CNTENSET_C | v, pmcntenclr_el0); > + isb(); > +} > + > +static inline void write_pmccfiltr(unsigned long val) > +{ > + write_sysreg(val, pmccfiltr_el0); > + isb(); > +} > + > +static inline uint64_t read_pmccfiltr(void) > +{ > + return read_sysreg(pmccfiltr_el0); > +} > + > static inline uint64_t get_pmcr_n(void) > { > return FIELD_GET(ARMV8_PMU_PMCR_N, read_sysreg(pmcr_el0)); > -- > 2.39.1.581.gbfd45094c4-goog >
Hi Reiji, On Thu, Mar 2, 2023 at 7:06 PM Reiji Watanabe <reijiw@google.com> wrote: > > Hi Raghu, > > On Tue, Feb 14, 2023 at 5:07 PM Raghavendra Rao Ananta > <rananta@google.com> wrote: > > > > Add basic helpers for the test to access the cycle counter > > registers. The helpers will be used in the upcoming patches > > to run the tests related to cycle counter. > > > > No functional change intended. > > > > Signed-off-by: Raghavendra Rao Ananta <rananta@google.com> > > --- > > .../testing/selftests/kvm/aarch64/vpmu_test.c | 40 +++++++++++++++++++ > > 1 file changed, 40 insertions(+) > > > > diff --git a/tools/testing/selftests/kvm/aarch64/vpmu_test.c b/tools/testing/selftests/kvm/aarch64/vpmu_test.c > > index d72c3c9b9c39f..15aebc7d7dc94 100644 > > --- a/tools/testing/selftests/kvm/aarch64/vpmu_test.c > > +++ b/tools/testing/selftests/kvm/aarch64/vpmu_test.c > > @@ -147,6 +147,46 @@ static inline void disable_counter(int idx) > > isb(); > > } > > > > +static inline uint64_t read_cycle_counter(void) > > +{ > > + return read_sysreg(pmccntr_el0); > > +} > > + > > +static inline void reset_cycle_counter(void) > > +{ > > + uint64_t v = read_sysreg(pmcr_el0); > > + > > + write_sysreg(ARMV8_PMU_PMCR_C | v, pmcr_el0); > > + isb(); > > +} > > + > > +static inline void enable_cycle_counter(void) > > +{ > > + uint64_t v = read_sysreg(pmcntenset_el0); > > + > > + write_sysreg(ARMV8_PMU_CNTENSET_C | v, pmcntenset_el0); > > + isb(); > > +} > > You might want to use enable_counter() and disable_counter() > from enable_cycle_counter() and disable_cycle_counter() respectively? > Yes, that should work. I'll do that. Thank you. Raghavendra > Thank you, > Reiji > > > + > > +static inline void disable_cycle_counter(void) > > +{ > > + uint64_t v = read_sysreg(pmcntenset_el0); > > + > > + write_sysreg(ARMV8_PMU_CNTENSET_C | v, pmcntenclr_el0); > > + isb(); > > +} > > + > > +static inline void write_pmccfiltr(unsigned long val) > > +{ > > + write_sysreg(val, pmccfiltr_el0); > > + isb(); > > +} > > + > > +static inline uint64_t read_pmccfiltr(void) > > +{ > > + return read_sysreg(pmccfiltr_el0); > > +} > > + > > static inline uint64_t get_pmcr_n(void) > > { > > return FIELD_GET(ARMV8_PMU_PMCR_N, read_sysreg(pmcr_el0)); > > -- > > 2.39.1.581.gbfd45094c4-goog > >
diff --git a/tools/testing/selftests/kvm/aarch64/vpmu_test.c b/tools/testing/selftests/kvm/aarch64/vpmu_test.c index d72c3c9b9c39f..15aebc7d7dc94 100644 --- a/tools/testing/selftests/kvm/aarch64/vpmu_test.c +++ b/tools/testing/selftests/kvm/aarch64/vpmu_test.c @@ -147,6 +147,46 @@ static inline void disable_counter(int idx) isb(); } +static inline uint64_t read_cycle_counter(void) +{ + return read_sysreg(pmccntr_el0); +} + +static inline void reset_cycle_counter(void) +{ + uint64_t v = read_sysreg(pmcr_el0); + + write_sysreg(ARMV8_PMU_PMCR_C | v, pmcr_el0); + isb(); +} + +static inline void enable_cycle_counter(void) +{ + uint64_t v = read_sysreg(pmcntenset_el0); + + write_sysreg(ARMV8_PMU_CNTENSET_C | v, pmcntenset_el0); + isb(); +} + +static inline void disable_cycle_counter(void) +{ + uint64_t v = read_sysreg(pmcntenset_el0); + + write_sysreg(ARMV8_PMU_CNTENSET_C | v, pmcntenclr_el0); + isb(); +} + +static inline void write_pmccfiltr(unsigned long val) +{ + write_sysreg(val, pmccfiltr_el0); + isb(); +} + +static inline uint64_t read_pmccfiltr(void) +{ + return read_sysreg(pmccfiltr_el0); +} + static inline uint64_t get_pmcr_n(void) { return FIELD_GET(ARMV8_PMU_PMCR_N, read_sysreg(pmcr_el0));
Add basic helpers for the test to access the cycle counter registers. The helpers will be used in the upcoming patches to run the tests related to cycle counter. No functional change intended. Signed-off-by: Raghavendra Rao Ananta <rananta@google.com> --- .../testing/selftests/kvm/aarch64/vpmu_test.c | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+)