| Message ID | 20230216160012.272345-2-kristina.martsenko@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: support Armv8.8 memcpy instructions in userspace | expand |
On Thu, Feb 16, 2023 at 04:00:03PM +0000, Kristina Martsenko wrote: > ARMv8.7/9.2 adds a new hypervisor configuration register HCRX_EL2. > Initialize the register to a safe value (all fields 0), to be robust > against firmware that has not initialized it. I think the risk of firmware not initialising this register is small given that EL3 needs to set SCR_EL3.HXEn to allow EL2 access. But it doesn't hurt to re-initialise it in the hypervisor. > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > index 212d93aca5e6..e06b34322339 100644 > --- a/arch/arm64/kernel/head.S > +++ b/arch/arm64/kernel/head.S > @@ -572,6 +572,13 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) > msr hcr_el2, x0 > isb > > + mrs x0, ID_AA64MMFR1_EL1 > + ubfx x0, x0, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4 > + cbz x0, 3f > + mov_q x1, HCRX_HOST_FLAGS > + msr_s SYS_HCRX_EL2, x1 > + isb > +3: > init_el2_state Nitpick: we can probably leave a single ISB after both HCR_EL2 and HCRX_EL2 are initialised. Well, we could probably drop all of them altogether, there's at least one down this path. > > /* Hypervisor stub */ > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S > index a6d67c2bb5ae..01f854697c70 100644 > --- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S > @@ -95,6 +95,12 @@ SYM_CODE_START_LOCAL(___kvm_hyp_init) > ldr x1, [x0, #NVHE_INIT_HCR_EL2] > msr hcr_el2, x1 > > + mrs x1, ID_AA64MMFR1_EL1 > + ubfx x1, x1, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4 > + cbz x1, 1f > + mov_q x2, HCRX_HOST_FLAGS > + msr_s SYS_HCRX_EL2, x2 > +1: Maybe you could use a macro to avoid writing this sequence twice. I lost track of the KVM initialisation refactoring since pKVM, it looks like the other register values are loaded from a structure here. I guess a value of 0 doesn't make sense to store (unless at a later point it becomes non-zero).
diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index e62785923ff6..699154229b15 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -284,14 +284,6 @@ cbz x1, .Lskip_sme_\@ msr_s SYS_SMPRIMAP_EL2, xzr // Make all priorities equal - - mrs x1, id_aa64mmfr1_el1 // HCRX_EL2 present? - ubfx x1, x1, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4 - cbz x1, .Lskip_sme_\@ - - mrs_s x1, SYS_HCRX_EL2 - orr x1, x1, #HCRX_EL2_SMPME_MASK // Enable priority mapping - msr_s SYS_HCRX_EL2, x1 .Lskip_sme_\@: .endm diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 5a4b2342d571..caa31f4ab1cd 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -9,6 +9,7 @@ #include <asm/esr.h> #include <asm/memory.h> +#include <asm/sysreg.h> #include <asm/types.h> /* Hyp Configuration Register (HCR) bits */ @@ -92,6 +93,8 @@ #define HCR_HOST_NVHE_PROTECTED_FLAGS (HCR_HOST_NVHE_FLAGS | HCR_TSC) #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H) +#define HCRX_HOST_FLAGS (HCRX_EL2_SMPME) + /* TCR_EL2 Registers bits */ #define TCR_EL2_RES1 ((1U << 31) | (1 << 23)) #define TCR_EL2_TBI (1 << 20) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 212d93aca5e6..e06b34322339 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -572,6 +572,13 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) msr hcr_el2, x0 isb + mrs x0, ID_AA64MMFR1_EL1 + ubfx x0, x0, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4 + cbz x0, 3f + mov_q x1, HCRX_HOST_FLAGS + msr_s SYS_HCRX_EL2, x1 + isb +3: init_el2_state /* Hypervisor stub */ diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S index a6d67c2bb5ae..01f854697c70 100644 --- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S +++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S @@ -95,6 +95,12 @@ SYM_CODE_START_LOCAL(___kvm_hyp_init) ldr x1, [x0, #NVHE_INIT_HCR_EL2] msr hcr_el2, x1 + mrs x1, ID_AA64MMFR1_EL1 + ubfx x1, x1, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4 + cbz x1, 1f + mov_q x2, HCRX_HOST_FLAGS + msr_s SYS_HCRX_EL2, x2 +1: ldr x1, [x0, #NVHE_INIT_VTTBR] msr vttbr_el2, x1
ARMv8.7/9.2 adds a new hypervisor configuration register HCRX_EL2. Initialize the register to a safe value (all fields 0), to be robust against firmware that has not initialized it. This is also needed to ensure that the register is reinitialized after kexec. In addition, move SMPME setup over to the new flags, as it would otherwise get overridden. It is safe to set the bit even if SME is not (uniformly) supported, as it will write to a RES0 bit (having no effect), and SME will be disabled by the cpufeature framework. (Similar to how e.g. the API bit is handled in HCR_HOST_NVHE_FLAGS.) Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com> --- arch/arm64/include/asm/el2_setup.h | 8 -------- arch/arm64/include/asm/kvm_arm.h | 3 +++ arch/arm64/kernel/head.S | 7 +++++++ arch/arm64/kvm/hyp/nvhe/hyp-init.S | 6 ++++++ 4 files changed, 16 insertions(+), 8 deletions(-)