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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id x22-20020a1c7c16000000b003e8dc7a03basm2772434wmc.41.2023.03.09.06.23.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 06:23:16 -0800 (PST) From: Alexandre Mergnat Date: Thu, 09 Mar 2023 15:23:06 +0100 Subject: [PATCH 17/21] arm64: dts: mediatek: add display support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230220-display-v1-17-45cbc68e188b@baylibre.com> References: <20230220-display-v1-0-45cbc68e188b@baylibre.com> In-Reply-To: <20230220-display-v1-0-45cbc68e188b@baylibre.com> To: =?unknown-8bit?b?RGFuaWVsIFZldHRlciA8ZGFuaWVsQGZmd2xsLmNoPiwgQ0sgSHUg?= =?unknown-8bit?b?PGNrLmh1QG1lZGlhdGVrLmNvbT4sIEppdGFvIFNoaSA8aml0YW8uc2hp?= =?unknown-8bit?b?QG1lZGlhdGVrLmNvbT4s?= =?unknown-8bit?q?_Thierry_Reding_=3Cthierry=2Ereding=40gmail=2Ecom=3E=2C_Phi?= =?unknown-8bit?q?lipp_Zabel_=3Cp=2Ezabel=40pengutronix=2Ede=3E=2C_Sam_Ravnb?= =?unknown-8bit?q?org_=3Csam=40ravnborg=2Eorg=3E=2C?= =?unknown-8bit?q?_Rob_Herring_=3Crobh+dt=40kernel=2Eorg=3E=2C_Uwe_Kleine-K?= =?unknown-8bit?q?=C3=B6nig_=3Cu=2Ekleine-koenig=40pengutronix=2Ede=3E=2C?= =?unknown-8bit?q?_Chun-Kuang_Hu_=3Cchunkuang=2Ehu=40kernel=2Eorg=3E=2C_Matth?= =?unknown-8bit?q?ias_Brugger_=3Cmatthias=2Ebgg=40gmail=2Ecom=3E=2C_David_Ai?= =?unknown-8bit?q?rlie_=3Cairlied=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Krzysztof_Kozlowski_=3Ckrzysztof=2Ekozlowski+dt=40linaro?= =?unknown-8bit?q?=2Eorg=3E=2C_Xinlei_Lee_=3Cxinlei=2Elee=40mediatek=2Ecom?= =?unknown-8bit?q?=3E?= Cc: Guillaume La Roque , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , dri-devel@lists.freedesktop.org, Fabien Parent , Neil Armstrong , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=6680; i=amergnat@baylibre.com; h=from:subject:message-id; bh=E1//0k1NYcUIDwg5zv5tn0PC2KL+Uw835ZkCZCGrLDU=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkCeu+68OwYw2MU0lI1uTlfqB+5VstpOZ4Z1JEuF4H 6r/nUP6JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZAnrvgAKCRArRkmdfjHURZU2D/ 9On0dg5e8cqzNThvm5WqK0hQjiJvjlBwj+v0KdvCdu7AnXIjTgMYKjDopomNHIemVQubvcG/AUFgCg IWrXEaxaBvpqzDJKulaoR62WfJLcKmCnFjHrWurwUzuCElGMyDW9W1iiCsmwE4a5pRKCmE3DDLROoS TZiLc2rsI1GUGqSbunpInCLZAozihnqUaAuWof7qTvkPZmp+T67MLNjta8679be5fCcPvi8wJFPKmI FNMfTTFBdWpz7KgZPZYz62z6WZ9rRmVRqSpVv3siA3XLqxrVAkGsLNbepfF72zpzbdRUihsJw6DZ8N PkpOgJVrFxRqvz2YhaXyFqDKnZ9maCYf7pjloR391np47FmhvHYNSBz7f0OTT2IwhInJAyTZFwDEbz DLjeC8IknCxa/DCRg1gHHzRuBZnJpISuaVVFQ3iO8uvmjo2b4JNTOoFOuTn0lKvuD439m4wKNVCfcW t1W6vyoUPEklo0q/7fyznM4/wdhCiwOihwIg8d6KcePZTISK45Lwv1dBUr6XcL1nQKUzScgYFcJkzq xqOxjOeaZaqd/XDHzVQs5nSVveIHTRgeM68oTVH0EugD7SzXHlOFgPh7rwMvSeZb7sc2O6EBr4iC94 QpFqj6DuRX6Ah3jmmH+NuWnLgSvaI3x7GU+SaxgG4epU3ur86n//3lGNtLgw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230309_062317_505897_794BC393 X-CRM114-Status: GOOD ( 12.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org MIPI DSI: - Add "vsys_lcm_reg" regulator support and setup the "mt6357_vsim1_reg", to power the pannel plugged to the DSI connector. - Setup the Display Parallel Interface. - Add the startek kd070fhfid015 pannel support. HDMI: - Add HDMI connector support. - Add the "ite,it66121" HDMI bridge support, driven by I2C1. - Setup the Display Parallel Interface. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 204 ++++++++++++++++++++++++++++ 1 file changed, 204 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 30850e7c8155..793f5a9cbeae 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -26,6 +26,18 @@ chosen { stdout-path = "serial0:921600n8"; }; + connector { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "d"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_connector_out>; + }; + }; + }; + firmware { optee { compatible = "linaro,optee-tz"; @@ -86,6 +98,59 @@ optee_reserved: optee@43200000 { reg = <0 0x43200000 0 0x00c00000>; }; }; + + vsys_lcm_reg: regulator-vsys-lcm { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&pio 129 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "vsys_lcm"; + }; +}; + +&dpi0 { + pinctrl-0 = <&dpi_default_pins>; + pinctrl-1 = <&dpi_idle_pins>; + pinctrl-names = "default", "sleep"; + status = "okay"; + + port { + dpi_out: endpoint { + remote-endpoint = <&it66121_in>; + }; + }; +}; + + +&dsi0 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + panel@0 { + compatible = "startek,kd070fhfid015"; + status = "okay"; + reg = <0>; + dcdc-gpios = <&pio 67 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 20 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&default_panel_pins>; + pinctrl-names = "default"; + iovcc-supply = <&mt6357_vsim1_reg>; + power-supply = <&vsys_lcm_reg>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + + port { + dsi_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; }; &i2c0 { @@ -97,6 +162,50 @@ &i2c0 { #size-cells = <0>; }; +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + clock-div = <2>; + clock-frequency = <100000>; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + status = "okay"; + + it66121hdmitx: it66121hdmitx@4c { + #sound-dai-cells = <0>; + compatible = "ite,it66121"; + interrupt-parent = <&pio>; + interrupts = <68 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&ite_pins>; + pinctrl-names = "default"; + reg = <0x4c>; + reset-gpios = <&pio 69 GPIO_ACTIVE_LOW>; + vcn18-supply = <&mt6357_vsim2_reg>; + vcn33-supply = <&mt6357_vibr_reg>; + vrf12-supply = <&mt6357_vrf12_reg>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + it66121_in: endpoint { + bus-width = <12>; + remote-endpoint = <&dpi_out>; + }; + }; + + port@1 { + reg = <1>; + hdmi_connector_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; +}; + &mmc0 { pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc0_default_pins>; @@ -150,12 +259,60 @@ &mt6357_vmc_reg { regulator-always-on; }; +&mt6357_vsim1_reg { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +}; + /* Needed by ethernet */ &mt6357_vsim2_reg { regulator-always-on; }; &pio { + dpi_default_pins: dpi-default-pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + drive-strength = ; + }; + }; + + dpi_idle_pins: dpi-idle-pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + gpio_keys: gpio-keys-pins { pins { pinmux = ; @@ -174,6 +331,36 @@ pins_i2c { }; }; + i2c1_pins: i2c1 { + pins_i2c { + pinmux = , + ; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <00>; + bias-pull-up; + }; + }; + + ite_pins: ite-pins { + + irq_ite_pins { + pinmux = ; + input-enable; + bias-pull-up; + }; + + pwr_pins { + pinmux = , + ; + output-high; + }; + + rst_ite_pins { + pinmux = ; + output-high; + }; + }; + mmc0_default_pins: mmc0-default-pins { clk-pins { pinmux = ; @@ -315,6 +502,23 @@ usb1-vbus-pins { }; }; + default_panel_pins: default-panel-pins { + dcdc-pins { + pinmux = ; + output-low; + }; + + en-pins { + pinmux = ; + output-low; + }; + + rst-pins { + pinmux = ; + output-high; + }; + }; + pwm_pins: pwm-pins { pins { pinmux = ,