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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id x22-20020a1c7c16000000b003e8dc7a03basm2772434wmc.41.2023.03.09.06.22.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 06:22:58 -0800 (PST) From: Alexandre Mergnat Date: Thu, 09 Mar 2023 15:22:51 +0100 Subject: [PATCH 02/21] dt-bindings: display: mediatek: ccorr: add binding for MT8365 SoC MIME-Version: 1.0 Message-Id: <20230220-display-v1-2-45cbc68e188b@baylibre.com> References: <20230220-display-v1-0-45cbc68e188b@baylibre.com> In-Reply-To: <20230220-display-v1-0-45cbc68e188b@baylibre.com> To: =?unknown-8bit?b?RGFuaWVsIFZldHRlciA8ZGFuaWVsQGZmd2xsLmNoPiwgQ0sgSHUg?= =?unknown-8bit?b?PGNrLmh1QG1lZGlhdGVrLmNvbT4sIEppdGFvIFNoaSA8aml0YW8uc2hp?= =?unknown-8bit?b?QG1lZGlhdGVrLmNvbT4s?= =?unknown-8bit?q?_Thierry_Reding_=3Cthierry=2Ereding=40gmail=2Ecom=3E=2C_Phi?= =?unknown-8bit?q?lipp_Zabel_=3Cp=2Ezabel=40pengutronix=2Ede=3E=2C_Sam_Ravnb?= =?unknown-8bit?q?org_=3Csam=40ravnborg=2Eorg=3E=2C?= =?unknown-8bit?q?_Rob_Herring_=3Crobh+dt=40kernel=2Eorg=3E=2C_Uwe_Kleine-K?= =?unknown-8bit?q?=C3=B6nig_=3Cu=2Ekleine-koenig=40pengutronix=2Ede=3E=2C?= =?unknown-8bit?q?_Chun-Kuang_Hu_=3Cchunkuang=2Ehu=40kernel=2Eorg=3E=2C_Matth?= =?unknown-8bit?q?ias_Brugger_=3Cmatthias=2Ebgg=40gmail=2Ecom=3E=2C_David_Ai?= =?unknown-8bit?q?rlie_=3Cairlied=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Krzysztof_Kozlowski_=3Ckrzysztof=2Ekozlowski+dt=40linaro?= =?unknown-8bit?q?=2Eorg=3E=2C_Xinlei_Lee_=3Cxinlei=2Elee=40mediatek=2Ecom?= =?unknown-8bit?q?=3E?= Cc: Guillaume La Roque , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , dri-devel@lists.freedesktop.org, Fabien Parent , Neil Armstrong , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=888; i=amergnat@baylibre.com; h=from:subject:message-id; bh=C7jd7hPJyNNK65umqiaqv8dPlJYkmQJemWR+tpy2or0=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkCeu+0ew6YaHQB5gxrKawL2Go78SiMBY25/zTN4Z2 MRX1zaSJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZAnrvgAKCRArRkmdfjHURTHeD/ 0ZAamMi7T+h2vz6GHOVNWgosBIBUISGisRUy+7NzqleA2E6NBx5WeM7D27F1qOLovxDYPlTo4MPfqD KpDgQTVD6HUqmO6GbVpUYpOxLUCRIJ4R2I3LzqJeopB2Q644bdO6i59E5JxsBLYqx+BHEKbusVVbqW 6VIvz9g1Jh7/oHqCuCxH/wM7Jl1cDjLB4e7xxH+ikBLfP7/4Ut4d9krtxEZthCLCyW5nBeIoCApaak ixzLu6XsWhGP6Ochs++nUaJ1+H+8JiS0bygnM4F/JyVQo/NY/Xx1SwNrt8UPBoDzMEOeqGkH2VtPg7 JQtWf0HqXftZbe2FCLvTfPVsn6hwJTXvJZuKIymeMu6eSDiq/hd2v3HbcTzLlZ7k+10ejDi/2fD2my OytIuUhmihdhn7FXT+OFr4ZLE7TgeVXJBwqrALhdDqm3Qo5keCG5juCY4xOIYeJ8flcRRYngzqVLJl CFVkOAQCJeAuZ1XG2/LuZv/sGWCCDdEiA7jf+1Uo2rJE86KgTkgAK5Qi0MwdXY2KiwFmk8SQXZapgh HIUej/Ux3FH2LrmRsqWWzp6TULX/lR8raDTk/nHbLQgr476hOBDzn63rVuvVXBicZSdy31VRO2SdSE 2vR/2pqUG1VVmOizx3ImOzJI/esDslVyHIyYLiYZB0cpztNZQd7jmdh2l6Lw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230309_062300_563121_4BDB612A X-CRM114-Status: GOOD ( 10.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Display Color Correction for MT8365 is compatible with another SoC. Then, add MT8365 binding along with MT8183 SoC. Signed-off-by: Alexandre Mergnat Acked-by: Krzysztof Kozlowski Reviewed-by: Chun-Kuang Hu --- Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml index 63fb02014a56..fc999e614718 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml @@ -32,6 +32,7 @@ properties: - items: - enum: - mediatek,mt8186-disp-ccorr + - mediatek,mt8365-disp-ccorr - const: mediatek,mt8183-disp-ccorr reg: