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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id x22-20020a1c7c16000000b003e8dc7a03basm2772434wmc.41.2023.03.09.06.23.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 06:23:19 -0800 (PST) From: Alexandre Mergnat Date: Thu, 09 Mar 2023 15:23:09 +0100 Subject: [PATCH 20/21] drm/mediatek: add MT8365 SoC support MIME-Version: 1.0 Message-Id: <20230220-display-v1-20-45cbc68e188b@baylibre.com> References: <20230220-display-v1-0-45cbc68e188b@baylibre.com> In-Reply-To: <20230220-display-v1-0-45cbc68e188b@baylibre.com> To: =?unknown-8bit?b?RGFuaWVsIFZldHRlciA8ZGFuaWVsQGZmd2xsLmNoPiwgQ0sgSHUg?= =?unknown-8bit?b?PGNrLmh1QG1lZGlhdGVrLmNvbT4sIEppdGFvIFNoaSA8aml0YW8uc2hp?= =?unknown-8bit?b?QG1lZGlhdGVrLmNvbT4s?= =?unknown-8bit?q?_Thierry_Reding_=3Cthierry=2Ereding=40gmail=2Ecom=3E=2C_Phi?= =?unknown-8bit?q?lipp_Zabel_=3Cp=2Ezabel=40pengutronix=2Ede=3E=2C_Sam_Ravnb?= =?unknown-8bit?q?org_=3Csam=40ravnborg=2Eorg=3E=2C?= =?unknown-8bit?q?_Rob_Herring_=3Crobh+dt=40kernel=2Eorg=3E=2C_Uwe_Kleine-K?= =?unknown-8bit?q?=C3=B6nig_=3Cu=2Ekleine-koenig=40pengutronix=2Ede=3E=2C?= =?unknown-8bit?q?_Chun-Kuang_Hu_=3Cchunkuang=2Ehu=40kernel=2Eorg=3E=2C_Matth?= =?unknown-8bit?q?ias_Brugger_=3Cmatthias=2Ebgg=40gmail=2Ecom=3E=2C_David_Ai?= =?unknown-8bit?q?rlie_=3Cairlied=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Krzysztof_Kozlowski_=3Ckrzysztof=2Ekozlowski+dt=40linaro?= =?unknown-8bit?q?=2Eorg=3E=2C_Xinlei_Lee_=3Cxinlei=2Elee=40mediatek=2Ecom?= =?unknown-8bit?q?=3E?= Cc: Guillaume La Roque , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , dri-devel@lists.freedesktop.org, Fabien Parent , Neil Armstrong , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2552; i=amergnat@baylibre.com; h=from:subject:message-id; bh=n59ZUgmONlb1UajjYquStIE5vhX/aVPKSxJb0sPGiU0=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkCeu+k482A81ACWwejcT34Rd/p34RqAsJqbxOisAp SUjd0vqJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZAnrvgAKCRArRkmdfjHURWi4D/ 0TiZe3q/k7NsRcaMTOlQHeDWee6bQ6pdAgV8j4eJRo/iHydZZbOm8dlumln1AMVKIHl1w/Zp2Qps4z wKOoogD3jt6pML5FVVdmYhkoGJ+4/Q3byLqqsDEcRhywMoQPp3bDc+69loKNyGqxwDuiVvzWKBOk3M n9fokdBO+zMT8V0WfWNnQ0lqtIHnKmYRilecNuiGGUi6giWB9hri1feen5GhkOLJiklV/9stbfh2lk cRTv5WfcZUAracBieuisYpfxLb3pg5clc9KLj+MW2CYNItb5GS+R1mpdIdFA2sUZWjPVNYgjmaaD8i kafeT6ejU9G61UxNlIQ6CmUPquFVO0J6Zpi6pngFuJT4XceRiaUajSIU5LQoat4BkJQVYCMbjJuDBb ueHs9qhMLCaEZ+0y4ZAcw4m30Kc504cisk59PgpSpxrmP+O+NqJBJvtqUVTlHKIM5jUE9b67Vkbnhe dRQo4PST5Kel2MaVamYQ7H7mg19tV/tiW8fpeCIhbdYaBl3lt9iHLuIqF2Iuu+c9Zdt9rLkomn8+QI xJQCX2L80MFHeVN6wn3QuJTFf8ws4rD8sqzki9wJF+CQe/s7+LPckPZuSoYUM1oYxFaqxdg6E+7DZL /shmh3OGx+QIYzQAmenxR8VjOgUor17JLipQp8NbwPwqAn1MHSkJd0PnvTYA== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230309_062321_136039_A6A09649 X-CRM114-Status: GOOD ( 12.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Fabien Parent Add DRM support for MT8365 SoC. Signed-off-by: Fabien Parent Signed-off-by: Alexandre Mergnat --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 35 ++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index cd5b18ef7951..b905f38d5660 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -210,6 +210,22 @@ static const enum mtk_ddp_comp_id mt8195_mtk_ddp_main[] = { DDP_COMPONENT_DP_INTF0, }; +static const enum mtk_ddp_comp_id mt8365_mtk_ddp_main[] = { + DDP_COMPONENT_OVL0, + DDP_COMPONENT_RDMA0, + DDP_COMPONENT_COLOR0, + DDP_COMPONENT_CCORR, + DDP_COMPONENT_AAL0, + DDP_COMPONENT_GAMMA, + DDP_COMPONENT_DITHER0, + DDP_COMPONENT_DSI0, +}; + +static const enum mtk_ddp_comp_id mt8365_mtk_ddp_ext[] = { + DDP_COMPONENT_RDMA1, + DDP_COMPONENT_DPI0, +}; + static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .main_path = mt2701_mtk_ddp_main, .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), @@ -342,6 +358,21 @@ static const struct mtk_mmsys_match_data mt8195_mmsys_match_data = { }, }; +static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = { + .main_path = mt8365_mtk_ddp_main, + .main_len = ARRAY_SIZE(mt8365_mtk_ddp_main), + .ext_path = mt8365_mtk_ddp_ext, + .ext_len = ARRAY_SIZE(mt8365_mtk_ddp_ext), +}; + +static const struct mtk_mmsys_match_data mt8365_mmsys_match_data = { + .num_drv_data = 1, + .drv_data = { + &mt8365_mmsys_driver_data, + }, +}; + + static int mtk_drm_kms_init(struct drm_device *drm) { struct mtk_drm_private *private = drm->dev_private; @@ -591,6 +622,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { .data = (void *)MTK_DISP_MUTEX }, { .compatible = "mediatek,mt8195-disp-mutex", .data = (void *)MTK_DISP_MUTEX }, + { .compatible = "mediatek,mt8365-disp-mutex", + .data = (void *)MTK_DISP_MUTEX }, { .compatible = "mediatek,mt8173-disp-od", .data = (void *)MTK_DISP_OD }, { .compatible = "mediatek,mt2701-disp-ovl", @@ -673,6 +706,8 @@ static const struct of_device_id mtk_drm_of_ids[] = { .data = &mt8192_mmsys_match_data}, { .compatible = "mediatek,mt8195-mmsys", .data = &mt8195_mmsys_match_data}, + { .compatible = "mediatek,mt8365-mmsys", + .data = &mt8365_mmsys_match_data}, { } }; MODULE_DEVICE_TABLE(of, mtk_drm_of_ids);