From patchwork Tue Feb 21 12:06:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ravi Gunasekaran X-Patchwork-Id: 13147904 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 09A83C6379F for ; Tue, 21 Feb 2023 12:45:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9TJpw7jPnasXR9MvYB/8Oxe7rMo4CErmSAQ0kQ35CwM=; b=apfVApdY1x6kHO kClOxnidDun2sHsnPW8lb4MKy2f9In3W3IKIgEoc/934/I5/VHpz5o3Tq1FAvKvpjkyp3Mae7TnnP ioy8KBZLtmF4OdbxK7iJhqFDQ9J5Bq8J/olo/oK57n50Gq0Yv+QN9PnxRrtIQrCBdN0GijioMrBqn SF8VMJP/IdcuulU/e0gtNwz5Q/re6APbVOdQ2Rost0zeqetGnSljMLl8hW5TAHLIs0jaJyt2wC29H 5sdXaLxE9XfYufXHt7qN+ezcTzFieiARlaS6LdGXvVE9qc+N34l1xBPYJEpkBh+Jg/kPlnFqBwVuc 6l8vTEu5nkvx3nLpMIhA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pUS0M-0087rQ-FQ; Tue, 21 Feb 2023 12:44:22 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pURPt-007p9O-4L for linux-arm-kernel@lists.infradead.org; Tue, 21 Feb 2023 12:06:42 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 31LC6Vw7020280; Tue, 21 Feb 2023 06:06:31 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1676981191; bh=JA31+o79aoRTpPnIzNT5dbG0WqplPar2Vl+yLOC/gfo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jeKEx2k+KJmM3VfW1nLVxaef9Jsm/dOrhkMvGzhLy0BaaNgC7rHeCe1zLa1FNNPBz /vuxhSQcxGgGerxpFHq3CQ4CWBzEzE3mZ5RGAG8xjx7BarGb8wap6c/EjrORGY4fPA HCK/0zQIM9YEcmZyahc78fDMip7fEWPH6qQkI868= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 31LC6VZm006288 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 21 Feb 2023 06:06:31 -0600 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Tue, 21 Feb 2023 06:06:31 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Tue, 21 Feb 2023 06:06:31 -0600 Received: from uda0500640.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 31LC6CbR030829; Tue, 21 Feb 2023 06:06:28 -0600 From: Ravi Gunasekaran To: , , , , , , , CC: , , Subject: [PATCH v10 4/9] arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI Date: Tue, 21 Feb 2023 17:36:07 +0530 Message-ID: <20230221120612.27366-5-r-gunasekaran@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230221120612.27366-1-r-gunasekaran@ti.com> References: <20230221120612.27366-1-r-gunasekaran@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230221_040641_311877_058D48C0 X-CRM114-Status: UNSURE ( 9.50 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Aswath Govindraju Add support for two instance of OSPI in J721S2 SoC. Signed-off-by: Aswath Govindraju Signed-off-by: Matt Ranostay Reviewed-by: Vaishnav Achath Link: https://lore.kernel.org/r/20221122101616.770050-4-mranostay@ti.com Signed-off-by: Ravi Gunasekaran --- .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 0af242aa9816..7e0e608578e1 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -306,4 +306,51 @@ ti,cpts-periodic-outputs = <2>; }; }; + + fss: bus@47000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, + <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, + <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; + + status = "disabled"; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x00 0x47040000 0x00 0x100>, + <0x05 0x00000000 0x01 0x00000000>; + interrupts = ; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 109 5>; + assigned-clocks = <&k3_clks 109 5>; + assigned-clock-parents = <&k3_clks 109 7>; + assigned-clock-rates = <166666666>; + power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + ospi1: spi@47050000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x00 0x47050000 0x00 0x100>, + <0x07 0x00000000 0x01 0x00000000>; + interrupts = ; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 110 5>; + power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + }; };