From patchwork Wed Mar 1 09:11:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ravi Gunasekaran X-Patchwork-Id: 13155693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E2F6CC7EE30 for ; Wed, 1 Mar 2023 09:13:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=p2MfxahjzdREM5vzQ5abitUWQQ7tzzIhRbjLhN9t/ec=; b=X7KmtJyjj/mncU Ra6p2NGzgXuxD72hs8pggabkeDI4d6kCrYEguiweio4M/1/CRc0g+2+x3dp3YeGStVK/V422Lf0xb SbN6veyCApyilgXcMkSponznI/W1NBYhcvovE2qdIc5Ra2WuUNlbWz2Z/3Cv1dUI/3/qg5M/pFjzp Vx96BBMUcvNOBGu+aXg0ho/EyWeb3QXN0N5Iaz6P/ISaIfM6NZKe7MLraowYGMcKrjFnygbpkuP4e mIbqR+8YsSLhktHZNLp6agrq2gacLtpFZ2aBAYQVxw3drVnh8aQ3D/TeWFkxWOykKnoM+OOrgY9Bf p86ZKcB6F+1a458UDGOw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pXIVP-00FW4Z-Mp; Wed, 01 Mar 2023 09:12:11 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pXIVA-00FVyX-Cp for linux-arm-kernel@lists.infradead.org; Wed, 01 Mar 2023 09:11:58 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3219BomX101953; Wed, 1 Mar 2023 03:11:50 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1677661910; bh=a33Qc9E+daUmRNMreI9poBGL8uG9LGp3Oz7aSe4KteE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=V/hiRdxuuaMl7zhd7ZwRTy56EnK0XkN7KgjhEyojOe1TmZfG+QwCudzFOf3BGVp/a d3c9ZaorqfSslDjhH9GWGxVDMZi2SSGheZNl01KW7yDh5vv/EWFelqRsCFY58GsRoE BqumHSTK0o6mtmddxV9TtpDfyBYnZ9fGOSaBy4rc= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3219BomD009101 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 1 Mar 2023 03:11:50 -0600 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 1 Mar 2023 03:11:49 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 1 Mar 2023 03:11:49 -0600 Received: from uda0500640.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3219BbbB088843; Wed, 1 Mar 2023 03:11:45 -0600 From: Ravi Gunasekaran To: , , , , , , , , CC: , , Subject: [PATCH v12 2/8] arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node Date: Wed, 1 Mar 2023 14:41:30 +0530 Message-ID: <20230301091136.17862-3-r-gunasekaran@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230301091136.17862-1-r-gunasekaran@ti.com> References: <20230301091136.17862-1-r-gunasekaran@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230301_011156_537171_7D9D5033 X-CRM114-Status: GOOD ( 14.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Matt Ranostay Add dt node for the single instance of WIZ (SERDES wrapper) and SERDES module shared by PCIe, eDP and USB. Signed-off-by: Matt Ranostay Signed-off-by: Ravi Gunasekaran --- I had reviewed this patch in the v7 series [0]. Since I'm taking over upstreaming this series, I removed the self Reviewed-by tag. [0] - https://lore.kernel.org/lkml/4173e0c6-61d9-5b79-44ec-317870de070b@ti.com/ Changes from v11: * Cleaned up comments Changes from v10: * Fixed dtbs warnings by adding "reg" property to the mux-controller nodes * Documented the reason for disabling the nodes by default * Removed Link tag from commit message Changes from v9: * Disabled serdes related nodes by default in common DT file Changes from v8: * No change Changes from v7: * Updated mux-controller node name Changes from v6: * Fixed the incorrect "compatible" property Changes from v5: * Removed Cc tag from commit message Changes from v4: * No change Changes from v3: * No change Changes from v2: * Reworked SERDES + WIZ enablement patchset to use properies for clocks defines versus entire devicetree nodes. Results in cleaner code that doesn't break dt-schema or the driver functionality. Changes from v1: * Update mux-controller node name arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index 37beaebc94bf..96e7dcc5ebad 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -5,6 +5,17 @@ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ +#include +#include + +/ { + serdes_refclk: clock-cmnrefclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; +}; + &cbass_main { msmc_ram: sram@70000000 { compatible = "mmio-sram"; @@ -39,6 +50,14 @@ #mux-control-cells = <1>; mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */ }; + + serdes_ln_ctrl: mux-controller@80 { + compatible = "mmio-mux"; + reg = <0x80 0x10>; + #mux-control-cells = <1>; + mux-reg-masks = <0x80 0x3>, <0x84 0x3>, /* SERDES0 lane0/1 select */ + <0x88 0x3>, <0x8c 0x3>; /* SERDES0 lane2/3 select */ + }; }; gic500: interrupt-controller@1800000 { @@ -792,6 +811,46 @@ }; }; + serdes_wiz0: wiz@5060000 { + compatible = "ti,j721s2-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 365 0>, <&k3_clks 365 3>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "ext_ref_clk"; + num-lanes = <4>; + #reset-cells = <1>; + #clock-cells = <1>; + ranges = <0x5060000 0x0 0x5060000 0x10000>; + + assigned-clocks = <&k3_clks 365 3>; + assigned-clock-parents = <&k3_clks 365 7>; + + status = "disabled"; + + serdes0: serdes@5060000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x05060000 0x00010000>; + reg-names = "torrent_phy"; + resets = <&serdes_wiz0 0>; + reset-names = "torrent_reset"; + clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>; + clock-names = "refclk", "phy_en_refclk"; + assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, + <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; + assigned-clock-parents = <&k3_clks 365 3>, + <&k3_clks 365 3>, + <&k3_clks 365 3>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + + status = "disabled"; /* Needs lane config */ + }; + }; + main_mcan0: can@2701000 { compatible = "bosch,m_can"; reg = <0x00 0x02701000 0x00 0x200>,