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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=leica-geosystems.com; Received-SPF: Pass (protection.outlook.com: domain of leica-geosystems.com designates 193.8.40.94 as permitted sender) receiver=protection.outlook.com; client-ip=193.8.40.94; helo=aherlnxbspsrv01.lgs-net.com; pr=C Received: from aherlnxbspsrv01.lgs-net.com (193.8.40.94) by AM0EUR02FT063.mail.protection.outlook.com (10.13.54.188) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6178.13 via Frontend Transport; Tue, 7 Mar 2023 04:44:58 +0000 From: Johannes Schneider To: Shawn Guo Cc: Pengutronix Kernel Team , NXP Linux Team , devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Sascha Hauer , Fabio Estevam , Li Yang , Shengjiu Wang , Richard Zhu , linux-arm-kernel@lists.infradead.org, Johannes Schneider Subject: [PATCH v12 1/2] arm64: dts: imx8mm-evk-revb: add support for i.MX8MM-EVK rev B Date: Tue, 7 Mar 2023 05:44:48 +0100 Message-Id: <20230307044449.2714529-2-johannes.schneider@leica-geosystems.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230307044449.2714529-1-johannes.schneider@leica-geosystems.com> References: <20230307044449.2714529-1-johannes.schneider@leica-geosystems.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM0EUR02FT063:EE_|AM6PR0602MB3398:EE_ X-MS-Office365-Filtering-Correlation-Id: ed6ce7ee-c486-43fc-dce8-08db1ec6b4f7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: leica-geosystems.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Mar 2023 04:44:58.8276 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ed6ce7ee-c486-43fc-dce8-08db1ec6b4f7 X-MS-Exchange-CrossTenant-Id: 1b16ab3e-b8f6-4fe3-9f3e-2db7fe549f6a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=1b16ab3e-b8f6-4fe3-9f3e-2db7fe549f6a;Ip=[193.8.40.94];Helo=[aherlnxbspsrv01.lgs-net.com] X-MS-Exchange-CrossTenant-AuthSource: AM0EUR02FT063.eop-EUR02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR0602MB3398 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230306_204504_690115_4647AF34 X-CRM114-Status: GOOD ( 15.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add devicetree for the revision B imx8mm-EVK, which comes with a different PMIC. The regulator min/max values are taken from the evk's schematic: 8MMINILPD4-CPU SPF-31399_C2.pdf Reviewed-by: Shawn Guo Signed-off-by: Johannes Schneider --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mm-evk-revb.dts | 134 ++++++++++++++++++ 2 files changed, 135 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-evk-revb.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 3ea9edc87909..5264f762386c 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -55,6 +55,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk-revb.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-bl.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk-revb.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk-revb.dts new file mode 100644 index 000000000000..2eabefb9cdc3 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk-revb.dts @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019-2022 NXP + */ + +/dts-v1/; + +#include "imx8mm-evk.dts" + +/ { + model = "FSL i.MX8MM EVK Revision B"; /* with PCA9450 PMIC */ + compatible = "fsl,imx8mm-evk-revb", "fsl,imx8mm"; +}; + +&i2c1 { + /* + * replace "rohm,bd71847" pmic found on previous evks + * with "nxp,pca9450a" + */ + /delete-node/ pmic@4b; + + pmic: pmic@25 { + compatible = "nxp,pca9450a"; + reg = <0x25>; + pinctrl-0 = <&pinctrl_pmic>; + pinctrl-names = "default"; + interrupt-parent = <&gpio1>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + + regulators { + /* VDD_SOC_0V8 */ + buck1_reg: BUCK1 { + regulator-name = "BUCK1"; + regulator-min-microvolt = <780000>; + regulator-max-microvolt = <900000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1250>; + }; + + /* VDD_ARM_0V9 */ + buck2_reg: BUCK2 { + regulator-name = "BUCK2"; + regulator-min-microvolt = <805000>; + regulator-max-microvolt = <1050000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1250>; + nxp,dvs-standby-voltage = <850000>; + }; + + /* VDD_DRAM&PU_0V9 (BUCK5 in datasheet) */ + buck3_reg: BUCK3 { + regulator-name = "BUCK3"; + regulator-min-microvolt = <805000>; + regulator-max-microvolt = <1000000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_3V3/NVCC_3V3 (BUCK6 in datasheet) */ + buck4_reg: BUCK4 { + regulator-name = "BUCK4"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3600000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_1V8/NVCC_1V8 (BUCK7 in datasheet) */ + buck5_reg: BUCK5 { + regulator-name = "BUCK5"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <1950000>; + regulator-boot-on; + regulator-always-on; + }; + + /* NVCC_DRAM_1V1 (BUCK8 in datasheet) */ + buck6_reg: BUCK6 { + regulator-name = "BUCK6"; + regulator-min-microvolt = <1060000>; + regulator-max-microvolt = <1140000>; + regulator-boot-on; + regulator-always-on; + }; + + /* NVCC_SNVS_1V8 */ + ldo1_reg: LDO1 { + regulator-name = "LDO1"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <19800000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_SNVS_0V8 */ + ldo2_reg: LDO2 { + regulator-name = "LDO2"; + regulator-min-microvolt = <760000>; + regulator-max-microvolt = <900000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDDA_1V8 */ + ldo3_reg: LDO3 { + regulator-name = "LDO3"; + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1890000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_PHY_0V9 */ + ldo4_reg: LDO4 { + regulator-name = "LDO4"; + regulator-min-microvolt = <855000>; + regulator-max-microvolt = <1000000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_PHY_1V2 (LDO6 in datasheet) */ + ldo5_reg: LDO5 { + regulator-name = "LDO5"; + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1260000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +};