| Message ID | 20230308173904.3449231-7-james.clark@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | coresight: Fix CTI module refcount leak by making it a helper device | expand |
Hi James,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.3-rc1 next-20230309]
[cannot apply to atorgue-stm32/stm32-next soc/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/James-Clark/coresight-Use-enum-type-for-cs_mode-wherever-possible/20230309-014226
patch link: https://lore.kernel.org/r/20230308173904.3449231-7-james.clark%40arm.com
patch subject: [PATCH 6/8] coresight: Refactor out buffer allocation function for ETR
config: arm-randconfig-r046-20230308 (https://download.01.org/0day-ci/archive/20230309/202303091603.UuxHblt7-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/3651e0e04e2a01c3cbcb4a4e9289092f2377dc13
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review James-Clark/coresight-Use-enum-type-for-cs_mode-wherever-possible/20230309-014226
git checkout 3651e0e04e2a01c3cbcb4a4e9289092f2377dc13
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/hwtracing/coresight/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303091603.UuxHblt7-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/hwtracing/coresight/coresight-tmc-etr.c: In function 'tmc_etr_get_sysfs_buffer':
>> drivers/hwtracing/coresight/coresight-tmc-etr.c:1174:13: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
1174 | int ret = 0;
| ^~~
vim +/ret +1174 drivers/hwtracing/coresight/coresight-tmc-etr.c
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1171
3651e0e04e2a01 James Clark 2023-03-08 1172 static struct etr_buf *tmc_etr_get_sysfs_buffer(struct coresight_device *csdev)
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1173 {
de5461970b3e9e Mathieu Poirier 2016-05-03 @1174 int ret = 0;
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1175 unsigned long flags;
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1176 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
96a7f644006ecc Suzuki K Poulose 2018-09-20 1177 struct etr_buf *sysfs_buf = NULL, *new_buf = NULL, *free_buf = NULL;
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1178
de5461970b3e9e Mathieu Poirier 2016-05-03 1179 /*
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1180 * If we are enabling the ETR from disabled state, we need to make
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1181 * sure we have a buffer with the right size. The etr_buf is not reset
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1182 * immediately after we stop the tracing in SYSFS mode as we wait for
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1183 * the user to collect the data. We may be able to reuse the existing
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1184 * buffer, provided the size matches. Any allocation has to be done
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1185 * with the lock released.
de5461970b3e9e Mathieu Poirier 2016-05-03 1186 */
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1187 spin_lock_irqsave(&drvdata->spinlock, flags);
96a7f644006ecc Suzuki K Poulose 2018-09-20 1188 sysfs_buf = READ_ONCE(drvdata->sysfs_buf);
96a7f644006ecc Suzuki K Poulose 2018-09-20 1189 if (!sysfs_buf || (sysfs_buf->size != drvdata->size)) {
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1190 spin_unlock_irqrestore(&drvdata->spinlock, flags);
de5461970b3e9e Mathieu Poirier 2016-05-03 1191
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1192 /* Allocate memory with the locks released */
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1193 free_buf = new_buf = tmc_etr_setup_sysfs_buf(drvdata);
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1194 if (IS_ERR(new_buf))
3651e0e04e2a01 James Clark 2023-03-08 1195 return new_buf;
de5461970b3e9e Mathieu Poirier 2016-05-03 1196
de5461970b3e9e Mathieu Poirier 2016-05-03 1197 /* Let's try again */
de5461970b3e9e Mathieu Poirier 2016-05-03 1198 spin_lock_irqsave(&drvdata->spinlock, flags);
de5461970b3e9e Mathieu Poirier 2016-05-03 1199 }
de5461970b3e9e Mathieu Poirier 2016-05-03 1200
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1201 if (drvdata->reading || drvdata->mode == CS_MODE_PERF) {
de5461970b3e9e Mathieu Poirier 2016-05-03 1202 ret = -EBUSY;
de5461970b3e9e Mathieu Poirier 2016-05-03 1203 goto out;
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1204 }
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1205
f2facc3366d77e Mathieu Poirier 2016-05-03 1206 /*
f2facc3366d77e Mathieu Poirier 2016-05-03 1207 * In sysFS mode we can have multiple writers per sink. Since this
f2facc3366d77e Mathieu Poirier 2016-05-03 1208 * sink is already enabled no memory is needed and the HW need not be
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1209 * touched, even if the buffer size has changed.
f2facc3366d77e Mathieu Poirier 2016-05-03 1210 */
f973d88b757037 Mathieu Poirier 2019-04-25 1211 if (drvdata->mode == CS_MODE_SYSFS) {
f973d88b757037 Mathieu Poirier 2019-04-25 1212 atomic_inc(csdev->refcnt);
f2facc3366d77e Mathieu Poirier 2016-05-03 1213 goto out;
f973d88b757037 Mathieu Poirier 2019-04-25 1214 }
f2facc3366d77e Mathieu Poirier 2016-05-03 1215
de5461970b3e9e Mathieu Poirier 2016-05-03 1216 /*
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1217 * If we don't have a buffer or it doesn't match the requested size,
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1218 * use the buffer allocated above. Otherwise reuse the existing buffer.
de5461970b3e9e Mathieu Poirier 2016-05-03 1219 */
96a7f644006ecc Suzuki K Poulose 2018-09-20 1220 sysfs_buf = READ_ONCE(drvdata->sysfs_buf);
96a7f644006ecc Suzuki K Poulose 2018-09-20 1221 if (!sysfs_buf || (new_buf && sysfs_buf->size != new_buf->size)) {
96a7f644006ecc Suzuki K Poulose 2018-09-20 1222 free_buf = sysfs_buf;
96a7f644006ecc Suzuki K Poulose 2018-09-20 1223 drvdata->sysfs_buf = new_buf;
de5461970b3e9e Mathieu Poirier 2016-05-03 1224 }
de5461970b3e9e Mathieu Poirier 2016-05-03 1225
de5461970b3e9e Mathieu Poirier 2016-05-03 1226 out:
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1227 spin_unlock_irqrestore(&drvdata->spinlock, flags);
6c6ed1e244c053 Mathieu Poirier 2016-05-03 1228
de5461970b3e9e Mathieu Poirier 2016-05-03 1229 /* Free memory outside the spinlock if need be */
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1230 if (free_buf)
75f4e3619fe202 Suzuki K Poulose 2018-07-11 1231 tmc_etr_free_sysfs_buf(free_buf);
3651e0e04e2a01 James Clark 2023-03-08 1232 return drvdata->sysfs_buf;
3651e0e04e2a01 James Clark 2023-03-08 1233 }
3651e0e04e2a01 James Clark 2023-03-08 1234
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 4711dfa7418c..e9327778d751 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1169,7 +1169,7 @@ void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) drvdata->etr_buf = NULL; } -static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) +static struct etr_buf *tmc_etr_get_sysfs_buffer(struct coresight_device *csdev) { int ret = 0; unsigned long flags; @@ -1192,7 +1192,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) /* Allocate memory with the locks released */ free_buf = new_buf = tmc_etr_setup_sysfs_buf(drvdata); if (IS_ERR(new_buf)) - return PTR_ERR(new_buf); + return new_buf; /* Let's try again */ spin_lock_irqsave(&drvdata->spinlock, flags); @@ -1223,17 +1223,33 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) drvdata->sysfs_buf = new_buf; } - ret = tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf); - if (!ret) { - drvdata->mode = CS_MODE_SYSFS; - atomic_inc(csdev->refcnt); - } out: spin_unlock_irqrestore(&drvdata->spinlock, flags); /* Free memory outside the spinlock if need be */ if (free_buf) tmc_etr_free_sysfs_buf(free_buf); + return drvdata->sysfs_buf; +} + +static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) +{ + int ret; + unsigned long flags; + struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct etr_buf *sysfs_buf = tmc_etr_get_sysfs_buffer(csdev); + + if (IS_ERR(sysfs_buf)) + return PTR_ERR(sysfs_buf); + + spin_lock_irqsave(&drvdata->spinlock, flags); + ret = tmc_etr_enable_hw(drvdata, sysfs_buf); + if (!ret) { + drvdata->mode = CS_MODE_SYSFS; + atomic_inc(csdev->refcnt); + } + + spin_unlock_irqrestore(&drvdata->spinlock, flags); if (!ret) dev_dbg(&csdev->dev, "TMC-ETR enabled\n"); @@ -1241,6 +1257,25 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) return ret; } +struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev, + enum cs_mode mode, void *data) +{ + struct perf_output_handle *handle = data; + struct etr_perf_buffer *etr_perf = etm_perf_sink_config(handle); + + switch (mode) { + case CS_MODE_SYSFS: + return tmc_etr_get_sysfs_buffer(csdev); + case CS_MODE_PERF: + if (WARN_ON(!etr_perf || !etr_perf->etr_buf)) + return ERR_PTR(-EINVAL); + return etr_perf->etr_buf; + default: + return ERR_PTR(-EINVAL); + } +} +EXPORT_SYMBOL_GPL(tmc_etr_get_buffer); + /* * alloc_etr_buf: Allocate ETR buffer for use by perf. * The size of the hardware buffer is dependent on the size configured diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 01c0382a29c0..b97da39652d2 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -332,5 +332,7 @@ struct coresight_device *tmc_etr_get_catu_device(struct tmc_drvdata *drvdata); void tmc_etr_set_catu_ops(const struct etr_buf_operations *catu); void tmc_etr_remove_catu_ops(void); +struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev, + enum cs_mode mode, void *data); #endif
When CATU is moved to the generic enable/disable path system in the next commit, it will need to call into ETR and get it to pre-allocate its buffer so add a function for it. No functional changes Signed-off-by: James Clark <james.clark@arm.com> --- .../hwtracing/coresight/coresight-tmc-etr.c | 49 ++++++++++++++++--- drivers/hwtracing/coresight/coresight-tmc.h | 2 + 2 files changed, 44 insertions(+), 7 deletions(-)